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Seoul National University

Seoul National University. Logic Design. Seoul National University. Overview of Logic Design. Fundamental Hardware Requirements Computation Storage Communication How to get values from one place to another Bits are Our Friends Everything expressed in terms of values 0 and 1 Computation

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Seoul National University

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  1. Seoul National University Logic Design

  2. Seoul National University Overview of Logic Design • Fundamental Hardware Requirements • Computation • Storage • Communication • How to get values from one place to another • Bits are Our Friends • Everything expressed in terms of values 0 and 1 • Computation • Compute Boolean functions • Storage • Store bits of information • Communication • Low or high voltage on wire

  3. Seoul National University Digital Signals 1 0 0 Voltage Time • Use voltage thresholds to extract discrete values from continuous signal • Simplest version: 1-bit signal • Either high range (1) or low range (0) • With guard range between them • Not strongly affected by noise or low quality circuit elements • Can make circuits simple, small, and fast

  4. Seoul National University a && b Computing with Logic Gates And Or Not a a a out out out b b out = a b || out = a b out = a && ! • Outputs are Boolean functions of inputs • Respond continuously to changes in inputs • With some, small delay b Voltage a Time

  5. Seoul National University Combinational Circuits Acyclic Network Inputs Outputs • Acyclic Network of Logic Gates • Continuously responds to changes on inputs • Outputs become (after some delay) Boolean functions of inputs

  6. Seoul National University Bit equal a eq b Bit Equality HCL Expression booleq = (a&&b)||(!a&&!b) • Generate 1 if a and b are equal • Hardware Control Language (HCL) • Very simple hardware description language • Boolean operations have syntax similar to C logical operations • We’ll use it to describe control logic for processors

  7. Seoul National University b31 Bit equal eq31 a31 b30 Bit equal eq30 a30 Eq B = Eq b1 Bit equal eq1 A a1 b0 Bit equal eq0 a0 Word Equality Word-Level Representation HCL Representation boolEq = (A == B) • 32-bit word size • HCL representation • Equality operation • Generates Boolean value

  8. Seoul National University Bit-Level Multiplexor s Bit MUX HCL Expression b bool out = (s&&a)||(!s&&b) out a • Control signal s • Data signals a and b • Output a when s=1, b when s=0

  9. Seoul National University s b31 out31 a31 s b30 out30 MUX B Out a30 A b0 out0 a0 Word Multiplexor Word-Level Representation • Select input word A or B depending on control signal s • HCL representation • Case expression • Series of test : value pairs • Output value for first successful test HCL Representation int Out = [ s : A; 1 : B; ];

  10. Seoul National University MIN3 C Min3 B A s1 s0 MUX4 D0 D1 Out4 D2 D3 HCL Word-Level Examples • Find minimum of three input words • HCL case expression • Final case guarantees match Minimum of 3 Words int Min3 = [ A < B && A < C : A; B < A && B < C : B; 1 : C; ]; 4-Way Multiplexor • Select one of 4 inputs based on two control bits • HCL case expression • Simplify tests by assuming sequential matching int Out4 = [ !s1&&!s0: D0; !s1 : D1; !s0 : D2; 1 : D3; ];

  11. Seoul National University 1 0 2 3 Y Y Y Y A A A A X & Y X + Y X ^ Y X - Y X X X X B B B B OF OF OF OF ZF ZF ZF ZF CF CF CF CF A L U A L U A L U A L U Arithmetic Logic Unit • Combinational logic • Continuously responding to inputs • Control signal selects function computed • Corresponding to 4 arithmetic/logical operations in Y86 • Also computes values for condition codes

  12. Seoul National University I O Clock Sequential Circuit: Registers Structure i7 D o7 Q+ C i6 D o6 Q+ C i5 D o5 Q+ C i4 D o4 Q+ C i3 D o3 Q+ C i2 D o2 Q+ C i1 D o1 Q+ C i0 D o0 Q+ C Clock • Stores word of data • Different from program registers seen in assembly code • Collection of edge-triggered latches • Loads input on rising edge of clock

  13. Seoul National University Rising clock State = y y Output = y   Register Operation State = x x Input = y Output = x • Stores data bits • For most of time acts as barrier between input and output • As clock rises, loads input

  14. Seoul National University Comb. Logic 0 MUX 0 Out In 1 Load Clock A L U State Machine Example • Accumulator circuit • Load or accumulate on each cycle Clock Load x0 x1 x2 x3 x4 x5 In x0 x0+x1 x0+x1+x2 x3 x3+x4 x3+x4+x5 Out

  15. Seoul National University valA Register file srcA A valW Read Ports W dstW Write Port valB srcB B Clock Register File • Holds values of program registers (e.g., %eax, %esp, ...) • Register identifier serves as address • ID 15 (0xF) implies no read or write performed • Can perform two reads and one write in the same cycle • Each has separate address and data input/output

  16. Seoul National University Register file Register file y 2 valW valW W W dstW dstW x valA Register file srcA A Clock Clock valB srcB B x 2 Rising clock y   2 Register File Timing • Reading • Like combinational logic • Output data generated based on input address • After some delay • Writing • Like register • Updated only at the rising clock edge x 2 2

  17. Seoul National University Memory data out • Hold instructions and data for program • Read or write, one at a time • Read is like combinational logic (like register file) • Write is performed only at the rising clock edge • Error signal will be set if the address is out of range error Data Memory read clock write address data in

  18. Seoul National University Hardware Control Language • Very simple hardware description language • Can only express limited aspects of hardware operation • Parts we want to explore and modify • Data Types • bool: Boolean • a, b, c, … • int: words • A, B, C, … • Does not specify word size---bytes, 32-bit words, … • Statements • bool a = bool-expr; • int A = int-expr;

  19. Seoul National University HCL Operations • Classify by type of value returned • Boolean Expressions • Logic Operations • a && b, a || b, !a • Word Comparisons • A == B, A != B, A < B, A <= B, A >= B, A > B • Set Membership • A in { B, C, D } • Same as A == B || A == C || A == D • Word Expressions • Case expressions • [ a : A; b : B; c : C ] • Evaluate test expressions a, b, c, … in sequence • Return word expression A, B, C, … for first successful test

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