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Protocol Controllers

Protocol Controllers. Intel i82C527. Intel 82527. Stand alone CAN protocol controller Supports CAN Specification 2.0 Standard Data and Remote Frames Extended Data and Remote Frames Programmable Global Mask Standard Message ldentifier Extended Message ldentifier

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Protocol Controllers

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  1. Protocol Controllers Intel i82C527

  2. Intel 82527 • Stand alone CAN protocol controller • Supports CAN Specification 2.0 • Standard Data and Remote Frames • Extended Data and Remote Frames • Programmable Global Mask • Standard Message ldentifier • Extended Message ldentifier • 15 Message Objects of 8-Byte Data Length • 14 Tx/Rx Buffers • 1 Rx Buffer with Programmable Mask

  3. Intel 82527 • Flexible CPU Interface • 8-Bit Multiplexed • 16-Bit Multiplexed • 8-Bit Non-Multiplexed (Synchronous/Asynchronous) • Serial Interface • Programmable Bit Rate • Programmable Clock Output • Flexible Interrupt Structure • Flexible Status Interface

  4. Intel 82527 • Configurable Output Driver • Configurable Input Comparator • Two 8-Bit Bidirectional I/O Ports • 44-Lead PLCC Package • 44-Lead QFP Package • Pinout Compatibility with the 82526

  5. Intel 82527 Block Diagram

  6. Intel 82527Memory Map

  7. The Global Mask - extended register applies only to messages using the extended CAN identifier, or message objects with the XTD bit set to ``1''. This feature allows the user to Globally Mask, or ``don't care'', any identifier bits of the incoming message. This mask is programmable to allow the user the develop an application specific masking strategy. A ``0'' value means ``don't care'' on that bit for acceptance filtering. A ``1'’ value means that the 82527 will consider this bit for acceptance filtering. Intel 82527Extended Global Mask

  8. The Message 15 Mask register is a programmable local mask. This feature allows the user to locally mask, or ``don't care'', any identifier bits of the incoming message for message object 15. Incoming messages are first checked for an acceptance match in message objects 1±14 before passing through to message object 15. Consequently, the Global Mask and the local mask apply to messages received in message object 15. Intel 82527 Message 15 Mask

  9. Intel 82527 - Bit timing

  10. SJW defines the maximum number of time quanta a bit time may be shortened or lengthened by one resynchronization. The actual interpretation of this value by the hardware is to use one more than the programmed value. BRP Baud Rate Prescaler The valid programmed values are 0±63. The baud rate prescaler programs the length of one time quantum as follows: tq = tSCLK * (BRP + 1) where SCLK is the period of the system clock (SCLK). The default value of the bit timing register 0 after a hardware reset is unchanged. Intel 82527 - Bit timing

  11. Spl Sampling Mode Sampling mode = zero may result in faster bit transmissions rates, while sampling mode =one is more immune to noise spikes on the CAN bus. one Three samples are used for determining the valid bit value using majority logic. The CAN bus is sampled three times per bit time. zero One sample is used for determining the valid bit value. The CAN bus is sampled once per bit time. TSEG1 Time Segment 1 The valid programmed values are 2±15. TSEG1 is the time segment before the sample point. The actual interpretation of this value by the hardware is one more than the value programmed by the user. TSEG2 Time Segment 2 The valid programmed values are 1±7. TSEG2 is the time segment after the sample point. The actual interpretation of this value by the hardware is one more than the value programmed by the user. Intel 82527 - Bit timing

  12. Intel 82527 - Message Objects

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