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Design representations

Lecture 2.2. Paolo PRINETTO Politecnico di Torino (Italy) University of Illinois at Chicago, IL (USA) Paolo.Prinetto@polito.it Prinetto@uic.edu www.testgroup.polito.it. Design representations. Goal.

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Design representations

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  1. Lecture 2.2 Paolo PRINETTO Politecnico di Torino (Italy)University of Illinois at Chicago, IL (USA) Paolo.Prinetto@polito.it Prinetto@uic.edu www.testgroup.polito.it Design representations

  2. Goal • This lecture introduces the representation domains and abstraction levels mostly used to represent the design steps of a digital system.

  3. Homework • No particular homework is foreseen

  4. Prerequisites • Lecture # 2.1

  5. Further readings • No particular suggestion

  6. Outline • The representation matrix • Some relevant operations.

  7. abstraction domain The sub-spaceabstraction domain • The sub-space • is particularly meaningful to represent design descriptions.

  8. Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains

  9. The “abstraction level”deals with the desired degree of details Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains

  10. Abstractionlevels system RT logic device • The “representation domain” deals with the set of particular aspects of interest behavior structure physic geometry Representationdomains

  11. Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains

  12. Abstractionlevels It describes the behavior of the system, in terms of Input/Output relationships system RT logic device behavior structure physic geometry Representationdomains

  13. Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains

  14. It describes the structure(i.e., the topology)of the system, in terms of a set of blocks, properly interconnected Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains

  15. It describes the structure(i.e., the topology)of the system, in terms of a set of blocks, properly interconnected Abstractionlevels system RT logic device The description is technology independent behavior structure physic geometry Representationdomains

  16. Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains

  17. It describes the physical structure of the system, in terms of elementary components. They are used to implement the blocks defined in the structural domain. Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains

  18. It describes the physical structure of the system, in terms of elementary components. They are used to implement the blocks defined in the structural domain. Abstractionlevels system RT logic device The description is technology dependent behavior structure physic geometry Representationdomains

  19. Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains

  20. It describes the aspect of the system, in terms of geometrical patterns.These implement the blocks defined in the physical domain. Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains

  21. Note • The “geometrical domain” is out of the scope of the present course and it will be thus no further considered.

  22. behavior structure physic Abstractionlevels system RT logic device • Processes,algorithms Representationdomains

  23. SYSTEM POWER_ON POWER_OFF OFF ON RESET WAIT_CMD EXECUTING READ_DATA PROCESS_DATA EXECUTE A Y B Z

  24. behavior structure physic Abstractionlevels system RT logic device CPUs,memories,buses Representationdomains

  25. req1 req2 reqn end1 end2 endn ack1 ack2 ackn nak1 nak2 nakn send1j recvi1 send2j recvi2 sendnj recvin P1 P2 Pn … Controller

  26. behavior structure physic Abstractionlevels system RT logic device Boards,chips,connectors Representationdomains

  27. behavior structure physic Abstractionlevels system RT logic device • Logic, arithmetic, transfer operations; STG Representationdomains

  28. State Transition Graph (STG) reset 1 0 A,0 B,0 0 1 0 1 1 C,0 D,1 0

  29. behavior structure physic Abstractionlevels Arithmetic logicfunctional blocks system RT logic device Representationdomains

  30. A C B COMP > 0 1 MUX D ld

  31. behavior structure physic Abstractionlevels Technology Libraries of blocks system RT logic device Representationdomains

  32. behavior structure physic Abstractionlevels system RT logic device • Logic equations Representationdomains

  33. s1 s2 00 01 11 10 s3 1 0 1 1 1 0 1 0 0 1 s1 s2 s2 1 0 s3 1 1 0 function f • s1’ s2’ + s1 s3’ + s1 s2 .i 3 .o 1 00- 1 1-0 1 11- 1 .e

  34. behavior structure physic Abstractionlevels Ideal logic gates,flip-flops,latches system RT logic device Representationdomains

  35. f

  36. behavior structure physic Abstractionlevels system RT logic device Library Cells Representationdomains

  37. Netlists • Structural descriptions at the logic level are usually referred to as netlist. • Netlist descriptions are performed according to standards formats, such as: EDIF, JEDEC, etc.

  38. behavior structure physic Abstractionlevels system RT logic device • V(t), I(t), H() Representationdomains

  39. behavior structure physic Abstractionlevels system RT logic device Transistors,capacitors,resistors Representationdomains

  40. +V MP IN OUT MN GND [P.L. Civera]

  41. behavior structure physic Abstractionlevels system RT logic device Rectangles Representationdomains

  42. [P.L. Civera]

  43. Outline • The representation matrix • Some relevant operations.

  44. Relevant operations • Each point in the abstraction-domainsub-spacecorresponds to a specific design description • Each design step corresponds to a movement from one point to another in the design space • Some movements correspond to particularly significant design steps.

  45. Synthesis Abstraction levels Representationdomains

  46. Synthesis Methodologies • Synthesis Methodologies for digital systems are usually classified according to two orthogonal criteria: • involved synthesis tools • target building blocks.

  47. Synthesis Methodologies • Synthesis Methodologies for digital systems are usually classified according to two orthogonal criteria: • involved synthesis tools • target building blocks. • Manual • Automated • Partially automated

  48. Synthesis Methodologies • Synthesis Methodologies for digital systems are usually classified according to two orthogonal criteria: • involved synthesis tools • target building blocks. • Manual • Automated • Partially automated • Behavioral synthesis • RT level synthesis • logic level synthesis

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