1 / 10

ONL Stats Engine

ONL Stats Engine. David M. Zar Applied Research Laboratory Computer Science and Engineering Department. Opcode(4b) Data (12b) Index (16b). Stats Engine.

astillman
Download Presentation

ONL Stats Engine

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. ONL Stats Engine David M. ZarApplied Research LaboratoryComputer Science and Engineering Department

  2. Opcode(4b) Data (12b) Index (16b) Stats Engine • The Stats Engine will be a single ME devoted to accepting messages in a scratch ring and performing increment and add operations to counters. • All MEs that need to update counters will use the Stats Engine • Operations supported will be • Atomic increment (+1) • Atomic add (+data) • Format of the commands will be

  3. Opcode(4b) Data (12b) Index (16b) Opcodes • Opcode – • 0011 +1, +data pre-q counter specified in Index • 0111 +1, +data post-q counter specified in Index • 0010 +1 pre-q counter specified in Index • 0110 +1 post-q counter specified in Index • 0001 +data pre-q counter specified in Index • 0101 +data post-q counter specified in Index • 1011 +1, +data register specified in Index • 1010 +1 register specified in Index

  4. Stats Counters • Each Index specifies a group of four counters • Pre-Q packet count • Pre-Q byte count • Post-Q packet count • Post-Q byte count • The packet counters get updated when the +1 instructions are specified (opcodes 0-1-) • The byte counter get updated when the +data instructions are specified (opcodes 0--1) • For plug-ins, the use for each counter can be redefined but the opcodes do not change (i.e. each stats index corresponds to two incrementers and two adders).

  5. Stats Registers • For system-wide counters, we define a separate set of registers to handle them. • RX (packet and byte, 5 ports  10 words) • TX (packet and byte, 5 ports  10 words) • Drop counts (10 words) • Plug-in use (four per plug-in  20 words) • 10+10+10+20 = 50 so reserve 64 words for these • The register gets incremented when the +1 instructions are specified (opcodes 101-) • The register gets added to updated when the +data instructions are specified (opcodes 10-1) • The RX and TX counters will be assigned on even-word boundaries (lsb = 0) so we associate the packet and byte coutners, together, and can do the +1, +data instruction on them in one command • For plug-ins, the allocation of each register is under the control of the plug-in.

  6. ONL Router Counter Registers • // RX Per Port registers: (Updated by MUX) • ONL_ROUTER_RX_PORT0_PKT_CNTR • ONL_ROUTER_RX_PORT0_BYTE_CNTR • ONL_ROUTER_RX_PORT1_PKT_CNTR • ONL_ROUTER_RX_PORT1_BYTE_CNTR • ONL_ROUTER_RX_PORT2_PKT_CNTR • ONL_ROUTER_RX_PORT2_BYTE_CNTR • ONL_ROUTER_RX_PORT3_PKT_CNTR • ONL_ROUTER_RX_PORT3_BYTE_CNTR • ONL_ROUTER_RX_PORT4_PKT_CNTR • ONL_ROUTER_RX_PORT4_BYTE_CNTR • // TX Per Port registers: (Updated by HF) • ONL_ROUTER_TX_PORT0_PKT_CNTR • ONL_ROUTER_TX_PORT0_BYTE_CNTR • ONL_ROUTER_TX_PORT1_PKT_CNTR • ONL_ROUTER_TX_PORT1_BYTE_CNTR • ONL_ROUTER_TX_PORT2_PKT_CNTR • ONL_ROUTER_TX_PORT2_BYTE_CNTR • ONL_ROUTER_TX_PORT3_PKT_CNTR • ONL_ROUTER_TX_PORT3_BYTE_CNTR • ONL_ROUTER_TX_PORT4_PKT_CNTR • ONL_ROUTER_TX_PORT4_BYTE_CNTR • // IP Drop registers (Updated by PLC) • ONL_ROUTER_IP_HEC_DROP_CNTR • ONL_ROUTER_IP_LENGTH_ERR_DROP_CNTR • ONL_ROUTER_IP_HDR_LENGTH_ERR_DROP_CNTR • ONL_ROUTER_IP_VERSION_ERR_DROP_CNTR

  7. ONL Router Counter Registers • // PLC Drop registers (Updated by Parse, Lookup or Copy) • ONL_ROUTER_PLC_TO_PLUGIN_DROP_CNTR • ONL_ROUTER_PLC_TO_XSCALE_DROP_CNTR • // QM Drop registers (Updated by QM) • ONL_ROUTER_QUEUE_OVERFLOW_DROP_CNTR • // XScale Drop registers (Updated by XScale) • ONL_ROUTER_XSCALE_DROP_CNTR • // Rx Drop registers (Updated by Rx) • ONL_ROUTER_RX__DROP_CNTR • // Tx Drop registers (Updated by Tx) • ONL_ROUTER_TX_DROP_CNTR • // Per Block Generic Error Counters • ONL_ROUTER_RX_GENERIC_ERROR_CNTR • ONL_ROUTER_MUX_GENERIC_ERROR_CNTR • ONL_ROUTER_PLC_GENERIC_ERROR_CNTR • ONL_ROUTER_QM_GENERIC_ERROR_CNTR • ONL_ROUTER_HF_GENERIC_ERROR_CNTR • ONL_ROUTER_TX_GENERIC_ERROR_CNTR • ONL_ROUTER_STATS_GENERIC_ERROR_CNTR • ONL_ROUTER_FREELISTMGR_GENERIC_ERROR_CNTR

  8. ONL Router Counter Registers • // Plugin 0 Counters (for use however Plugin writer wants to use them) • ONL_ROUTER_PLUGIN_0_CNTR_0 • ONL_ROUTER_PLUGIN_0_CNTR_1 • ONL_ROUTER_PLUGIN_0_CNTR_2 • ONL_ROUTER_PLUGIN_0_CNTR_3 • // Plugin 2 Counters (for use however Plugin writer wants to use them) • ONL_ROUTER_PLUGIN_1_CNTR_0 • ONL_ROUTER_PLUGIN_1_CNTR_1 • ONL_ROUTER_PLUGIN_1_CNTR_2 • ONL_ROUTER_PLUGIN_1_CNTR_3 • // Plugin 2 Counters (for use however Plugin writer wants to use them) • ONL_ROUTER_PLUGIN_2_CNTR_0 • ONL_ROUTER_PLUGIN_2_CNTR_1 • ONL_ROUTER_PLUGIN_2_CNTR_2 • ONL_ROUTER_PLUGIN_2_CNTR_3 • // Plugin 3 Counters (for use however Plugin writer wants to use them) • ONL_ROUTER_PLUGIN_3_CNTR_0 • ONL_ROUTER_PLUGIN_3_CNTR_1 • ONL_ROUTER_PLUGIN_3_CNTR_2 • ONL_ROUTER_PLUGIN_3_CNTR_3 • // Plugin 4 Counters (for use however Plugin writer wants to use them) • ONL_ROUTER_PLUGIN_4_CNTR_0 • ONL_ROUTER_PLUGIN_4_CNTR_1 • ONL_ROUTER_PLUGIN_4_CNTR_2 • ONL_ROUTER_PLUGIN_4_CNTR_3

  9. Stats Counter Priority • There are two levels of priority for Stats Counters • High-priority (high-speed) are kept in local memory. There are 64 sets of counters for the router and 64 for the plug-ins • Low-priority (low-speed) are in SRAM. There are 216-128 = 65408 of these. • Stats Counters 0-127 point to the high-priority counters while 128-65535 are low-priority counters. • Using low-priority Stats Counters to count events that happen at high speed may degrade system performance (being a pre-Q counter on a high-priority queue, for example) • Plug-ins need to be aware of the segmentation of priority so they can use the proper priority counters based on needs • Stats Registers are always high-priority • One ME thread will be used to write 8W chunks of the local memory counters/registers to SRAM so that each counter/register is updated in SRAM several times a second.

  10. Local Memory Map

More Related