1 / 11

Marek Morawski, Hanna Rothkaehl Space Research Centre PAS

ESA EJSM/JGO Radio & Plasma Waves Instrument Digital Processing Unit (architecture and design concept) (data compression example). Marek Morawski, Hanna Rothkaehl Space Research Centre PAS. DPU Architecture. Board Supervisor Unit. BSU – Main Tasks.

Download Presentation

Marek Morawski, Hanna Rothkaehl Space Research Centre PAS

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. ESA EJSM/JGORadio & Plasma Waves InstrumentDigital Processing Unit (architecture and design concept)(data compression example) Marek Morawski, Hanna Rothkaehl Space Research Centre PAS

  2. DPU Architecture

  3. Board Supervisor Unit

  4. BSU – Main Tasks The BSU features should cover all functions required for minimum instrument functionality • Internal mode control • Tele command (TC) verification, validation and execution • Switching and commanding of measurements module • Data collection and buffering • Telemetry (TM) packet formatting and sending • Housekeeping data collection

  5. Clock Management Unit The Clock Management Unit is dedicated to provide stable clock source for BSU and SPU modules.

  6. Power Distribution Unit Power consumption

  7. Memory Unit • Code loader & Exception service (*) • Application software code (*) • Application data structures (*) • Configuration and calibration tables • Software patches • Configuration bit streams of SPU FPGA • Telemetry packet buffer (*) Correct Always & Scrubbing

  8. Housekeeping Acquisition The analogue to digital conversion is based on comparison of measured value to generated voltage ramp signal (reduced number of analog IC is used). Digital part of ADC is embeded in BSU FPGA

  9. Signal Processing Unit Implementation of RAM configured FPGA (Xilinx) • Possibility of reconfiguration during the flight • Algorithm hardware implementation • Wide portfolio of IP modules • TMRTool (triple logic)

  10. Data compression algorithm example Quqdrature spectrum 16 bit integer values of 1024*(I+Q) points{ = 4 kB } to 220 bytes of TM packet. 1. Calculation of: I^2 + Q^2 for each of 1024 frequency points (samples) 2. Calculation of: N = 220 mean values of bins in steeps: 1,2,3,4 act. (according the table; constant f/f ratio), 3. Square root of mean values Ni are calculated (220 sqrts ), 4. 220 results are scaling to fit to 16-bits integer numbers (positive only), 5. The 16-bit integer numbers are converted to floating point 8-bit numbers (maximum relative error 6.25%). Data compression ratio is: K = 4096/220 ~= 18,6,

  11. Compression algorithm result

More Related