Programmable Logic Architecture Verilog HDL FPGA Design

1. Programmable Logic Architecture Verilog HDL FPGA Design Jason Tseng Week 6

2. Abstract • Today’s class: • More examples using data-flow modeling

3. Review of Data-Flow Modelling-Operators • Arithmetic operators: • Operators: ‘+’::= addition, ‘-’::=subtraction, ‘*’::= multiplication, ‘/’::= division, ‘%’::=modulus. • Relational operators: • Operators: ‘<‘::= less than, ‘<=‘::= less than or equal to, ‘>’::= greater than, ‘>=’::= greater than or equal to, ‘==‘::= equal to, ‘!=‘::= not equal to. • Bit-wise operators: • Operators: ‘~’::= bitwise NOT, ‘&’::= bitwise AND, ‘|’::= bitwise OR, ‘^’::= bitwise XOR, ‘~^’ or ‘^~’::= bitwise XNOR. • Reduction operators: • Operators: ‘&’::= reduction AND, ‘|’::= reduction OR, ‘~&’::= reduction NAND, ‘~|’::= reduction NOR, ‘^’::= reduction XOR, ‘~^’ or ‘^~’:: XNOR.

4. Review of Data-Flow Modelling-Operators • Logical operators: • Operators: ‘!’::= logical NOT, ‘&&’::= logical AND, ‘||’::= logical OR. • Shift operators: • Operators: ‘<<‘::= shift left, ‘>>’::= shift right • Concatenation operator: • Operator: ‘{}’::= concatenation. • Replication operator: • Operator: ‘{n{item}}’::= n fold replication of an item. • Conditional operator: • Operator: (cond.) ? (result if cond. true) : result if cond. false)

5. Example-Decoder A decoder is a device which does the reverse of an encoder, undoing the encoding so that the original information can be retrieved. The same method used to encode is usually just reversed in order to decode. In digital electronics, a decoder can take the form of a multiple-input, multiple-output logic circuit that converts coded inputs into coded outputs, where the input and output codes are different. e.g. n-to-2n, BCD decoders. We can have 2-to-4 decoder, 3-to-8 decoder or 4-to-16 decoder. We can form a 3-to-8 decoder from two 2-to-4 decoders (with enable signals). In CPU design, the instruction decoder is the part of the CPU that converts the bits stored in the instruction register. E.g., I/O (input/output) port address: 000000H-0003FFH Sound Card is decoded by driver to: 0220H-022FH Gameport Joystick: 0201H; D-Link: 0240H-025FH

6. Low (0) 3-8 decoder (2 methods) True-value (or Boolean algebraic) based Shift-left operator based

7. Example-Encoder An encoder can be a device used to change a signal (such as a bitstream) or data into a code. The code serves any of a number of purposes such as compressing information for transmission or storage, encrypting or adding redundancies to the input code, or translating from one code to another. This is usually done by means of a programmed algorithm, especially if any part is digital, while most analog encoding is done with analog circuitry. An encoder has 2n input lines and n output lines. The output lines generate a binary code corresponding to the input value. For example a single bit 4 to 2 encoder takes in 4 bits and outputs 2 bits. It is assumed that there are only 4 types of input signals these are : 0001, 0010, 0100, 1000.

8. 4-2 Encoder (2 methods) Method 1: Boolean algebra Method 2: if block < ==== >

9. 1-4 Demultiplexer (3 methods) Method 1: Boolean algebra 1 Method 2: assign & conditional operator Method 3: if blocks Method 4: case blocks y0 y3 y1,y2

10. 3-bit Majority 3-variable K-map table: I1,I0 I2 Boolean algebra:

11. 1-bit full subtractor 3-variable K-map table Y,Bin Y,Bin X X Bout diff Boolean algebra: