1 / 3

First Integration Tests

First Integration Tests. Jovan Mitrevski, John Parsons Nevis Labs, Columbia University August 21/2003 on July 30/31, we successfully performed first phase of Integration Tests of new L1CAL trigger at FNAL VMESCL board was successfully installed and integrated

cain
Download Presentation

First Integration Tests

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. First Integration Tests Jovan Mitrevski, John Parsons Nevis Labs, Columbia University August 21/2003 • on July 30/31, we successfully performed first phase of Integration Tests of new L1CAL trigger at FNAL • VMESCL board was successfully installed and integrated • thanks to Dan for his support before and during the tests

  2. Integration Tasks • Infrastructure installation on platform next to MCH • Installed rack with 9U (TAB) and 6U (ADC/FIR) VME crates • Installed Linux-based PC for DAQ, and Windows-based PC for firmware development • Installed Bit3 VME card in 9U crate • Installed VMESCL card in 9U crate • Installed SCL Receiver daughtercard on VMESCL card • “Offline tests” (using CLK from VMESCL on-board oscillator) • Verified can reset VME bus • Verified communication with VMESCL card • Read VMESCL status register • Write/read VMESCL scratch registers • Switch between Offline and Online modes

  3. Integration Tasks (cont’d) • Online tests • Verified proper reception and locking onto SCL CLK in Online mode • Verified proper reception and response to SCL signals: 1. Initialization • SCL INIT recognized and sent on to TABS (checked with scope since TAB was not installed) • VMESCL local bunch crossing counter properly reset by first Turn signal after INIT, and then counts in agreement with lower bits of SCL BCID 2. Triggering • L1Periods and L1Accepts recognized • L1 trigger properly sent on to TABS for (L1Period AND L1Accept) • After successful completion of tests, Bit3 + VMESCL were sent back to Nevis • Will need to be re-installed for next stage of integration tests, including one TAB

More Related