1 / 135

SPRING 2010 REVIEW SESSION FOR SECOND 3330 MIDTERM

SPRING 2010 REVIEW SESSION FOR SECOND 3330 MIDTERM. Jehan-François Pâris jfparis@sbcglobal.net. Materials on the midterm. From Chapter IV—Computer Arithmetic Floating-point operations Whole Chapter V—Processor Architecture From Chapter VI—Memory Hierarchy Technology overview.

Download Presentation

SPRING 2010 REVIEW SESSION FOR SECOND 3330 MIDTERM

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. SPRING 2010 REVIEW SESSIONFOR SECOND 3330 MIDTERM Jehan-François Pâris jfparis@sbcglobal.net

  2. Materials on the midterm • From Chapter IV—Computer Arithmetic • Floating-point operations • Whole Chapter V—Processor Architecture • From Chapter VI—Memory Hierarchy • Technology overview

  3. General hints • You will be allowed to bring with youone 8.5"×11" one-sided sheet of notes • I like to ask • Short problems • Test how you can apply the materials • Questions about motivations, advantages and disadvantages • Test whether you understand the materials

  4. FLOATING POINT OPERATIONS

  5. Hints • Focus on • Floating point number representation • Single and double precision • Exponent biases • Conversions • Addition, subtraction and multiplication • General organization of FP unit • Skip instruction set issues

  6. Fractional binary numbers • 0.1 is ½ or 0.5ten • 0.01 is 0.1 is 1/4 or 0.25ten • 0.11 is ½ + ¼ = ¾ or 0.75ten • 1.1 is 1½ or 1.5ten • 10.01 is 2 + ¼ or 2.5ten • 11.11 is ______ or _____

  7. Normalizing binary numbers • 0.1 becomes 1.0×2-1 • 0.01 becomes 1.0×2-2 • 0.11 becomes 1.1×2-1 • 1.1 is already normalized and equal to1.0×20 • 10.01 becomes 1.001×21 • 11.11 becomes 1______×2_____

  8. S Exp Coefficient Representation • Sign + exponent + coefficient • IEEE Standard 754 • 1 + 8 + 23 = 32 bits • 1+ 11 + 52 = 64 bits (double precision)

  9. The sign bit • 0 indicates a positive number • 1 a negative number

  10. The exponent (I) • 8 bits for single precision • 11 bits for double precision • With 8 bits, we can represent exponents between -126 and + 127 • All-zeroes value is reserved for the zeroes and denormalized numbers • All-ones value are reserved for the infinities and NaNs (Not a Number)

  11. The exponent (II) • Exponents are represented using a biased notation • Stored value = actual exponent + bias • For 8 bit exponents, bias is 127 • Stored value of 1 corresponds to –126 • Stored value of 254 corresponds to +127 0 and 255 are reserved for special values

  12. Special values (I) • Signed zeroes: • IEEE 754 distinguishes between +0 and –0 • Represented by • Sign bit: 0 or 1 • Biased exponent: all zeroes • Coefficient: all zeroes

  13. Special values (II) • Denormalized numbers: • Numbers whose coefficient cannot be normalized • Smaller than 2–126 • Will have a coefficient with leading zeroes and exponent field equal to zero • Reduces the number of significant digits • Lowers accuracy

  14. Special values (III) • Infinities: • + and – • Represented by • Sign bit: 0 or 1 • Biased exponent: all ones • Coefficient: all zeroes

  15. Special values (IV) • NaN: • For Not a Number • Often result from illegal divisions:0/0, ∞/∞, ∞/–∞, –∞/∞, and –∞/–∞ • Represented by • Sign bit: 0 or 1 • Biased exponent: all ones • Coefficient: non zero

  16. 0 01…1 000000000000000000000000 The coefficient • Also known as fraction or significand • Most significant bit is always one • Implicit and not represented • Biased exponent is 127ten • True coefficient is implicit one followed by all zeroes

  17. Decoding a floating point number • Sign indicated by first bit • Subtract 127 from biased exponent to obtain power of two: <be> – 127 • Use coefficient to construct a normalized binary value with a binary point:1.<coefficient> • Number being represented is1.<coefficient> × 2<be> – 127

  18. 0 01…0 00000000000000000000000000000 First example • Sign bit is zero:Number is positive • Biased exponent is 126Power of two is-1 • Normalized binary value is 11.0000000 • Number is 1×2-1 = ½

  19. 1 10…0 11000000000000000000000000000 Second example • Sign bit is one:Number is negative • Biased exponent is 128Power of two is 1 • Normalized binary value is1.1100000 • Number is -1.11×21 = -11.1 = -3.5ten

  20. Encoding a floating point number • Use sign to pick sign bit • Normalize the number:Convert it to form 1.<more bits> × 2<exp> • Add 127 to exponent <exp> to obtainbiased exponent <be> • Coefficient <coeff> is equal to fractional part <more bits> of number

  21. 0 10…01 01000000000000000000000000000 First example • Represent 5: • Convert to binary: 101 • Normalize: 1.01×22 • Sign bit is 0 • Biased exponent is 127 + 2 = 10000001two • Coefficient is 0100…0

  22. 1 01…10 10000000000000000000000000000 Second example • Represent –3/4 • Convert to binary: 0.11 • Normalize: 1.1×2-1 • Sign bit is 1 • Biased exponent is 127 -1 = 01111110two • Coefficient is 10…0

  23. Guard bits • Do all arithmetic operations with two additional bits to reduce rounding errors

  24. Double precision arithmetic • Use 64-bit double words • One bit for sign • Eleven bits for exponent • 2,048 possible values • Exponent bias is 1023 • Fifty-two bits for coefficient • Plus the implicit leading bit

  25. Encoding and decoding • Same procedures as for single precision • Remember that exponent bias is now 1,203

  26. If that is now enough, … • Can use 128-bit quad words • Allows us to have • One bit for sign • Fifteen bits for exponent • From –16382 to +16383 • One hundred twelve bits for coefficient • Plus the implicit leading bit

  27. Binary floating point addition (I) • Say 1001 + 10 or 1.001×23 + 1.0×21 • Denormalize number with smaller exponent:1.001×23 + 0.01×23 • Add the numbers:1.001×23 + 0.01×23 = 1.011×23 • Result is normalized

  28. Binary floating point addition (II) • Say 101 + 11 or 1.01×22 + 1.1×21 • Denormalize number with smaller exponent:1.01×22 + 0.11×22 • Add the numbers:1.01×22 + 0.11×22 = 10.00×22 • Normalize the results10.00×22 = 1.000×23

  29. Binary floating point subtraction • Say 101 – 11 or 1.01×22 – 1.1×21 • Denormalize number with smaller exponent:1.01×22 – 0.11×22 • Perform the subtraction:1.01×22 – 0.11×22 = 0.10×22 • Normalize the results0.10×22 = 1.0×21

  30. Decimal floating point multiplication • Exponent of product is the sum of the exponents of multiplicand and multiplier • Coefficient of product is the product of the coefficients of multiplicand and multiplier • Compute sign using usual rules of arithmetic • May have to renormalize the product

  31. Decimal floating point multiplication • 6×103 + 2.5×102 = ? • Exponent of product is:3 + 2 = 5 • Multiply the coefficients:6×2.5 = 15 • Result will be positive • Normalize the result:15×105 = 1.5×106

  32. Binary floating point multiplication • Exponent of product is the sum of the exponents of multiplicand and multiplier • Coefficient of product is the product of the coefficients of multiplicand and multiplier • Compute sign using usual rules of arithmetic • May have to renormalize the product

  33. Binary floating point multiplication • Say 110 ×11 or 1.1×22 × 1.1×21 • Exponent of product is:2 + 1 = 3 • Multiply the coefficients:1.1 × 1.1 = 10.01 • Result will be positive • Normalize the result:10.01×103 = 1.001×104

  34. FP division • Very tricky • One good solution is to multiply the dividend by the inverse of the divisor That is all you need to know!

  35. A trap • Addition does not necessarily commute: • –9×1037 + 9×1037 + 4×10-37 • Observe that • (–9×1037 + 9×1037) + 4×10-37 = 4×10-37 while • –9×1037 + (9×1037+ 4×10-37) = 0 due to the limited accuracy of FP numbers

  36. IMPLEMENTATIONS

  37. The floating-point unit • Floating-point instructions were an optional feature • User had to buy a separate floating-point unit aka floating point coprocessor • As a result, many processor architectures keep using separate banks of registers for integer arithmetic and floating point arithmetic • A very good solution

  38. Why? • Having separate banks of integer and FP registers increases the number of registers without requiring an extra bit in the register address fields • Remain 5 bits for MIPS even though we now have 64 registers

  39. Stack operations (I) • Three types of operations: • Loads store an operand on the top of the stack • Arithmetic and comparison operations find two operands of the top of the stack and replace them by the result of the operation • Stores move the top of stack register into memory

  40. b b + c --- --- c b --- Example • a = b + c • Load b on top of stack • Load c on top of stack • Add c to b • Store result into a b b --- b --- ---

  41. Stack operations (II) • Instruction set also allowed • Operations on top of stack register and the ith register below • Immediate operands • Operations on top of stack register and a memory location • Poor performance of FP unit architecture motivated an extension to the x86 instruction set

  42. Review questions • How would you represent 0.5 in double precision? • How would you convert this double-precision value into a single precision format? • When doing accounting, we could do all the computations in cents using integer arithmetic. What would we win? What would we lose?

  43. PROCESSOR ARCHITECTURE Jehan-François Pâris jfparis@sbcglobal.net

  44. Hints (I) • Focus on • Data paths followed by each class of instructions • Pipelining • Pipelining hazards • Data hazards • Control hazards IMPORTANT

  45. Hints (II) • Focus on • Techniques used to reduce • Data hazards • Forwarding results • Troubles with ld instruction • Control hazards • Early decision for beq, bne instructions • Exceptions/interrupts IMPORTANT

  46. A "TOY" CPU

  47. The subset • Will include • Load and store instructions:lw (load word) and sw (store word) • Arithmetic-logic instructions:add, sub, and, or and slt (set less than) • Branch instructions:beq (branch if equal) and j (jump)

  48. Load and store instructions • Format I • Three operands: • Two registers r1 and r2 • One displacement d • lw r1, d(r2) loads into register r1 main memory word at address contents(r2) + d • sw r1, d(r2) stores contents of register r1 into main memory word at address contents(r2) + d

  49. Arithmetic-logic instructions • Format R • Three operands: • Three registers r1, r2 and r3 • Store into register r1 result of r2 <op> r3where <op> can be add, subtract, and, oras well as set if less than

  50. Branch instruction • Format I • Three operands: • Two registers r1 and r2 • One displacement d • beq, r1, r2, dset value of PC to PC+4 + 4×diff r1 = r2

More Related