1 / 7

Memory (Contd..)

ETEG 431 SG. Memory (Contd..). Memory Timing: Definitions. Non-Volatile Read-Write Memory. Read-Write Memory. Read-Only Memory. Random. Non-Random. EPROM. Mask-Programmed. Access. Access. 2. E. PROM. Programmable (PROM). FLASH. FIFO. SRAM. LIFO. DRAM. Shift Register. CAM.

davis
Download Presentation

Memory (Contd..)

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. ETEG 431 SG Memory (Contd..) Memory Timing: Definitions

  2. Non-Volatile Read-WriteMemory Read-Write Memory Read-Only Memory Random Non-Random EPROM Mask-Programmed Access Access 2 E PROM Programmable (PROM) FLASH FIFO SRAM LIFO DRAM Shift Register CAM ETEG 431 SG Memory Semiconductor Memory Classification

  3. BL BL BL VDD WL WL WL 1 BL BL BL WL WL WL 0 GND Diode ROM MOS ROM 1 MOS ROM 2 ETEG 431 SG Memory Read-Only Memory Cells

  4. BL [0] BL [1] BL [2] BL [3] WL [0] V DD WL [1] WL [2] V DD WL [3] V bias Pull-down loads ETEG 431 SG Memory MOS OR ROM

  5. 20 V 0 V 5 V 20 V 0 V 5 V S D S D S D Avalanche injection Removing programming voltage leaves charge trapped Programming results in higher V . T ETEG 431 SG Memory EPROM: Floating-Gate Transistor Programming

  6. Gate Floating gate Drain Source 20 – 30 nm 1 1 n n Substrate p V 10 nm DD ETEG 431 SG Memory WL EEPROM

  7. Control gate Floating gate erasure Thin tunneling oxide 1 1 n source n drain programming p- substrate ETEG 431 SG Memory Flash EEPROM

More Related