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CS M51A/EE M16 Winter’05 Section 1 Logic Design of Digital Systems Lecture 10

W’05. CS M51A/EE M16 Winter’05 Section 1 Logic Design of Digital Systems Lecture 10. February 14. Yutao He yutao@cs.ucla.edu 4532B Boelter Hall http://courseweb.seas.ucla.edu/classView.php?term=05W&srs=187154200. Outline. Administrative Matters Arithmetic Operations Overflow Detection

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CS M51A/EE M16 Winter’05 Section 1 Logic Design of Digital Systems Lecture 10

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  1. W’05 CS M51A/EE M16 Winter’05 Section 1 Logic Design of Digital SystemsLecture 10 February 14 Yutao He yutao@cs.ucla.edu 4532B Boelter Hall http://courseweb.seas.ucla.edu/classView.php?term=05W&srs=187154200

  2. Outline • Administrative Matters • Arithmetic Operations • Overflow Detection • Multiplication • Division • Arithmetic modules • 1-bit half adder • 1-bit full adder • n-bit full adder • carry-ripple adder • ALUs • Multipliers

  3. Administrative Matters • Project #1 • Is posted • Midterm Review • I will be holding the Midterm Review Session on Wednesday • Midterm on Friday • Details will be given on Wednesday

  4. Arithmetic o o Signed Integer T.C. Form Conversion Positive True Negative Complement Addition Addition (Carry) Subtraction Complementation + Addition Left Right Shift Operation Multiplication Division Overflow . Range Extension . Detection Out of Range Arithmetic - What You Have to Learn

  5. Overflow Detection • Numbers can be represented in computers are limited • 32-bits => over 4 billions unique numbers • An Overflow occurs when an arithmetic operation results in a number outside the range of those that can be represented • Addition • Subtraction • Multiplication • It is desirable to detection the occurrence of an overflow • It depends on number systems that are used

  6. Overflow Detection (Cont’d) Add two positive numbers to get a negative number or two negative numbers to get a positive number -1 -1 +0 +0 -2 -2 1111 0000 +1 1111 0000 +1 1110 1110 0001 0001 -3 -3 +2 +2 1101 1101 0010 0010 -4 -4 1100 +3 1100 +3 0011 0011 -5 -5 1011 1011 0100 +4 0100 +4 1010 1010 -6 -6 0101 0101 +5 +5 1001 1001 0110 0110 -7 -7 +6 +6 1000 0111 1000 0111 -8 -8 +7 +7 -7 - 2 = +7 5 + 3 = -8

  7. 0 1 1 1 0 1 0 1 0 0 1 1 1 0 0 0 1 0 0 0 1 0 0 1 1 1 0 0 1 0 1 1 1 5 3 -8 -7 -2 7 1 1 1 1 1 1 0 1 1 0 1 1 1 1 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 1 1 1 -3 -5 -8 5 2 7 Overflow Condition (Cont’d) Overflow Overflow No overflow No overflow Overflow occurs when carry in to sign does not equal to carry out

  8. Multiplication/Division by 2 • Multiplied by 2 • Left shift • Example: 0010 => 2, 0100=> 4 • Divided by 2 • Right shift • Example: 0010=>2, 0001=> 1

  9. Range Extension • To extend the length of a bit vector • Extend the left-most bit • Copy the same value as the left-most bit • Examples: • 0100 = 00000100 • 1100 = 11111100

  10. Summary of Basic Arithmetic Operations • Addition: • Take care of the carry-out • Subtraction: • Addition + complementation • Multiplication with 2: • Left shift • Division with 2: • Right shift

  11. Evaluation of Arithmetic Expressions • Basic Questions: • Given a digit vector X and a radix system • Find the value of a function f(x) • Algorithm • make up forms of power of 2 • range extension • for multiplication, left shift • for division, right shift • for negation, take complementation

  12. Evaluation: An Example • Given a bit vector X = 10011 • Find out the value of y = - (9x/2)+3 in 2’s complement system • Use only addition, complementation, shift, and range extension

  13. Arithmetic Modules: Overview • Types: • Binary Half/Full Adders • Arithmetic Logic Units (ALUs) • Comparators • n x m combinational Multipliers • Basic Questions: • Inputs/outputs • High-level/binary-level functions • Implementation • Delays

  14. x y sum carry 1-Bit Half Adder y y 0 1 0 1 x y Sum Carry x x 0 0 0 0 0 1 0 0 0 0 0 1 1 0 1 0 1 0 1 0 1 0 1 1 Carry = xy 1 1 0 1 x Sum (Propagate) Sum = x’y + xy’ = x  y y Carry (Generate) 1-bit Half Adder (HA)

  15. x y carry_in sum carry-out 1-Bit Full Adder High-Level Function: 1-bit Full Adder (FA)

  16. Truth Table: x y Cin S Cout 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 S Cin Cout Cin 1 1 1 1 1 K-Map: 0 1 3 2 4 5 7 6 0 1 3 2 4 5 7 6 x x 0 1 1 0 0 1 1 0 1 0 1 1 0 0 0 1 y y 1-bit Full Adder (Cont’d)

  17. Two-Level Minimal Expressions: 1-bit Full Adder (Cont’d)

  18. Alternative Implementation of FAs

  19. Multi-Level with XOR and AND/OR gates Multi-Level with XOR and NAND gates Alternative Implementation of FAs

  20. n-bit Full Adder

  21. n-bit Full Adder - Implementation • Brute-Force: • Too complicate when n is large • Bit-Slice: • Built on top of 1-bit FAs • Carry-Ripple • Carry-Lookahead

  22. For 2’s Comp: - No change For 1’s Comp: - Carry wrap-around n-bit Full Adder for Signed Integers How to Design a n-bit subtractor?

  23. 1101 In BCD code, it should be: 0001 0011 -> 13 1-Digit Decimal Adders • The decimal digits 0 through 9 are represented by 4-bit BCD codes • The remaining 4-bit codes are treated as don’t cares. • The key question: • What are the conditions under which a carry is generated to the next highest-order BCD digit? 0101 1000

  24. c3 z3 z2 z1 z0 cout s3 s2 s1 s0 4-bit Binary FA ……… ……… ……… ……… To Be Designed ……… ……… 1-Digit Decimal Adders (Cont.) • Design w/ 4-bit Binary Full Adder • Find out: • Inputs: • Outputs: • Functions: Truth Table 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 1 0 0 1 1 1 1 0 0 1 1 0 1 0 0 - - - - - 1 1 1 1 1 - - - - -

  25. Overflow Detection vs. Carry-Out • An Overflow occurs when an arithmetic operation results in a number outside the range of those that can be represented, it is an abnormal condition • In the presence of overflow, all results are incorrect, and a flag should be raised • Carry-out is a normal condition for computation • Generation of carry-out does not necessarily lead to an overflow • Detection: • Depends on number systems

  26. High-Level Language Program z = x + y; Compiler Assembly Language Program ADC Y Assembler Machine Language Program 0001 0100 0010 1000 0000 0000 1001 0010 Opcode Operand R R R CPU Control Signals Controller ALU Status Signals How A Computer Computes

  27. x y n n cin 2’s Comp. Arith. Unit F 3 n z cout s z v A Simple 2’s Comp. Arithmetic Unit

  28. ALU (Cont’d)

  29. ALU (Cont’d)

  30. 10010011 01001001 0 0 f2f1f0 = 001 1 Kx = 0 Ky = 0 KMX = 1 c0 = 0 0 ALU - An Example x = 10010011 y = 01001001 z = x+y? 1 0 0 0 11011100

  31. nxm Multiplier for Positive Integer • Inputs/Outputs: • the multiplicand (n bits): 0  x  2n - 1 • the multiplier (m bits): 0  y  2m - 1 • the product: (n+m bits): 0  z  (2n - 1)(2m - 1) • The high-level function:

  32. 8x6 Multiplication Bit Matrix

  33. An Implementation of 8x6 Multiplier

  34. An Implementation of 8x6 Multiplier

  35. Summary • Basic arithmetic operations • Arithmetic modules

  36. Next Lecture • Midterm Review

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