Comparison among modeling approaches for gate current computation in advanced gate stacks

Comparison among modeling approaches for gate current computation in advanced gate stacks ARCES: N.Barin, C.Fiegna, E.Sangiorgi BU: P.A.Childs FMNT-CNRS: D.Brunel , C.Busseret, A.Poncet PISA: A.Campera, G.Fiori, G.Iannaccone POLIMI: R.Gusmeroli, C. Monzio Compagnoni, A.L.Lacaita, A.S.Spinelli TUW: M.Karner, H.Kosina, E.Langer UDINE: F.Driussi, P.Palestri, L.Selmi WUT: B.Majkusiak, J.Walczak

Aim of Task 3 of SINANO Work-Package 4 Study of the performance and reliability of conventional (SiO2) and high-k thin insulator gate stacks for sub-50nm MOSFETs) • To support the understanding of device reliability issues and potential limitations of device performance related to the gate stack architecture of future CMOS technologies. The activities foreseen in this context are: • simulation of C/V and I/V for different gate stack and device architectures; • investigation of the effects of high-K materials and of the related defects, traps, charges, etc.. on the low-field mobility and carrier transport properties of the inversion channel. Two main phases : • comparison of gate leakage currents in advanced device architectures; • assessment of modeling requirements for ultra-thin oxide and high-k, metal gate stacks.

OUTLINE • Modeling approaches • Template devices • Results • C/V • I/V • Microscopic quantities • Comparison with experiments • Conclusions

Simulation Framework • Solution of the Schrödinger equation in the poly-Si/dielectric/Si stack Diel. Si poly +Poisson Equation • Boundary conditions ?

Boundary Conditions Define quantum boxes Closed =0 at both sides of a box In principle: no current ! Ig: semiclassical approach

Boundary Conditions Open: resonance peak Ei Inject plane waves and compute transmission/reflection

Boundary Conditions Open: perfectly-matched-layer Absorbing boundaries Complex eigenvalues

Boundary Conditions The Schrödinger equation is solved two times, applying Dirichlet and then Neumann conditions on both sides. This is like simulating an infinite periodical structure, but only over one half period Periodical T-prob. from the contact to the semiclassical turning point

Approaches followed by the partners Model 1 Model 2 Model 3 Model 4 Model 5 Model 6 Model 7 Different definitions of the quantum boxes in closed-boundaries

Template Devices • Device A: pure SiO2 (tOX=1nm) NPOLY=1020cm-3 (n-type) NSUB=1018cm-3 (p-type) • Device B: pure SiO2 (tOX=3nm) NPOLY=51019cm-3 (n-type) NSUB=31017cm-3 (p-type) • Device HK: 4nm HfO2+ 1nm ITL NPOLY=1020cm-3 (n-type) NSUB=31017cm-3 (p-type) • Device A and B are from: C. A. Richter, IEEE EDL, vol.22, p.35, 2001.

Simulation Parameters Same parameters in all modeling approaches

Results: C/V curves • Good overall agreement • Small problems in accumulation and at beginning of inversion (different models for poly-quantization) HK

Internal quantities affecting C/V Cond.Band in accumulation Subbands in inversion

Results: I/V Errors within a factor of 10 Much larger in accumulation (not shown) HK

Internal quantities affecting IG Escape-time HK

Internal quantities affecting IG Tunneling probability HK

Comparison with experiments Data from N.Yang et al., IEEE T-ED, vol.46, p.1464, 1999. Same physical parameters as in the template devices. NPOLY=1020cm-3 NSUB=51017cm-3 (from C/V)

Conclusions • Unprecedented comparison effort carried out by seven academic groups • Good agreement between results obtained using very different models (open/closed boundaries) • Approaches based on closed boundaries, coupled with the evaluation of the semiclassical escape-time provide a good trade-off between efficiency and precision • Results submitted to IEEE T-ED, 2nd review step: mandatory revisions • Comparison of Trap-Assisted-Tunneling

Comparison among modeling approaches for gate current computation in advanced gate stacks