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PCI interface

Y. Z. X. 4 x Com-1000. To/from Root. SlowAPM. Clock Controller. FastAPM. DtBus. DtSw. TzDM. Jn7_Daad. Jn0_Daad. ServiceBus. T-1000. GlobAddr. PCI interface. CPCI_Bus. ApeChan. TzMcode. J-1000 #0. J-1000 #7. Jn7 DM. Jn0 DM. TzPM. PmSw. JnModule_0. JnModule_7.

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PCI interface

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  1. Y Z X 4 x Com-1000 To/from Root SlowAPM Clock Controller FastAPM DtBus DtSw TzDM Jn7_Daad Jn0_Daad ServiceBus T-1000 GlobAddr PCI interface CPCI_Bus ApeChan TzMcode J-1000 #0 J-1000 #7 Jn7 DM Jn0 DM TzPM PmSw JnModule_0 JnModule_7 PMAddress JnPM JnMcode TzModule Fig.1. Structure of the APEmille Processing Board /Sasha/ 05.05.99

  2. TzMcode MicroCode Register SoftExc TzExc OR ALUexc ……... AGUexc TzRF 4 3 ALU Z GIF IF TzHalt 4 2 1 0 N HaltRq GCNB Displ AGU ChCtrl Com1000 control MX PC Load Reset MX SoftReset GlobAdd PMAddr DataBus Fig.2. T1000 architecture. /Sasha/ 24.02.99

  3. JnMcode MicroCode Register JnSoftExc 64 bit 66MHz OR JnExc JnRF 4 we3 OR FILU_exc ……... we4 Switch OR 4 3 2 1 0 Addr_exc Z JnIF LUT FILU IFstack N LOF JnDM_Add  GlobAdd JnDM control ….. JnDM_Data 64 bit 66MHz Fig.3. J1000 architecture (all commands except remote MTOJ ). /Sasha/ 15.09.99

  4. JnMcode MicroCode Register 64 bit 8.1MHz JnRF 4 4 3 2 1 0 LOF JnDM_Add  GlobAdd JnDM control ….. RG Daad1 GlobTrans control MX …. 16 bit 33MHZ RG JnDM_Data Daad0 16 bit 33MHZ 64 bit 8.1MHz Fig.4. J1000 architecture (remote MTOJ). /Sasha/ 15.09.99

  5. Jn0Daad0 Jn0Daad1 Jn1Daad0 Jn1Daad1 Jn2Daad0 Jn2Daad1 Jn3Daad0 Jn3Daad1 Jn4Daad0 Jn4Daad1 Crossbar Switch Jn5Daad0 Jn5Daad1 Jn6Daad0 Jn6Daad1 Jn7Daad0 Jn7Daad1 ChCtrl Trx control TsDt_Bus Fig.5. Com1000 architecture (remote transfer, 2x2x2 configuration). /Sasha/ 24.02.99

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