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2006 International Technology Roadmap for Semiconductors Radio Frequency and Analog/Mixed-Signal

2006 International Technology Roadmap for Semiconductors Radio Frequency and Analog/Mixed-Signal Technologies for Wireless Communications Working Group April 2006. Objectives. Use wireless IC as system / technology driver for ITRS

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2006 International Technology Roadmap for Semiconductors Radio Frequency and Analog/Mixed-Signal

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  1. 2006 International Technology Roadmap for Semiconductors Radio Frequency and Analog/Mixed-Signal Technologies for Wireless Communications Working Group April 2006

  2. Objectives • Use wireless IC as system / technology driver for ITRS • Address intersection of Si-based technologies with III-V compound semiconductors and other potential technologies (MEMS, BAW, Passives, ..) • Present technical challenges and requirements for AMS & RF IC technologies in wireless applications for cellular phones, WLAN/WPAN, automotive radar, and phased array RF systems, frequencies 0.8-100GHz • Major update in 2005 : Divided Working Group into 5 sub-groups • CMOS for RF and AMS (0.8-10 GHz) • Bipolar for RF and AMS (0.8-10 GHz) • Power Amplifiers and Power Management (0.8-10GHz) • Passives for RF&AMS and PA (0.8-10GHz) • Millimeter Wave (10-100GHz)

  3. Working Strategy • Communication System • Protocols • Standards • Frequencies • Circuit Figures-of-Merit • A/D, D/A • LNA • VCO • Synthesizer • Power Amplifier • Device Figures-of-Merit • Device Requirements • Potential Solutions • Challenges • Cross-working group aspects Technology Roadmap for Devices : Material system : Si, SiGe, GaAS, InP, SiC, GaN Device structures : MOSFET, LDMOS, HBT, MESFET, PHEMT, MHEMT, on-chip passives Divided in two frequency bands : • 0.8 – 10 GHz (CMOS, Bipolar, Passives, PA) • 10 – 100 GHz (mm-Wave)

  4. 2006 Organization Chair : Margaret Huang, Freescale 28 Members /last year 34 Co-chairs : Bin Zhao, Skyworks Jan-Erik Mueller, Infineon Editor : Herbert Bennett, NIST • Subgroup (1) : CMOS (11) Peter Cotrell, IBM • Subgroup (2) : Bipolar (6) Marco Racanelli, Jazz • Subgroup (3) : Passives (5) Sam Shichijo, TI • Subgroup (4) : PA & power management (4) P. Zampardi, Skyworks Chuck Weitzel, Freescale • Subgroup (5) : Millimeter Wave System (5) Tony Immorlica, BAE Systems

  5. 2006 Requirement Tables Updates • Expected updates in the following areas : • GaN : • Reflect higher level of progress • CMOS • Depending strongly on updates in LSTP roadmap (RF CMOS follows LSTP roadmap with 1 year lag) • Introduction of high-k / metal gate important for analog/RF CMOS : • 1/f noise • Matching performance • Leakage

  6. 2006 Cross-TWG Focus • Assembly & Packaging • Embedded passives requirements to be provided to Assy&Pkg : • volume product (e.g. GSM) • low power/short range product (e.g. Bluetooth) • mm-wave product (car radar or 60 GHz UWB) • Assy&Pkg want to expand the RF part of their chapter  Request for discussion on boundary between Wireless chapter and Assy&Pkg • Design • Discussed update of SiP design flow : • Focus has been on SoC design flow • Design will check with EDA vendors • Discussed impact of digital radio on analog/RF CMOS requirements table (to be continued)

  7. 2006 Cross-TWG Focus • Test • Had discussion on cost-effective testing of RF ICs • Follow-up in July Meeting • Discussed evolution of number of RF pins : • Impact of multi mode • Re-use of blocks (broadband) • PIDS • Update needed for LSTP roadmap • Update needed for high-k / metal gate introduction • I/O devices are not covered in their roadmap : • Re-use for analog versus dedicated optimization

  8. Difficult Challenges (1) • Signal isolation • Optimizing analog/RF CMOS devices with scaled technologies: mismatch, 1/f noise, and leakage with high-k gate dielectrics ; voltage gain • High density integrated passive element scaling and use of new materials: • Q-factor value for inductors • matching and linearity for capacitors • High range varactors for UWB • Reduced power supply voltages: degradation in SNR and signal distortion performance for AMS • Reduced device breakdown voltage in scaled technologies • Compound semiconductor substrate quality, especially for SiC • Larger size compound substrates [GaAs, SiC and InP] for lower chip costs and compatibility with silicon processing equipment

  9. Difficult Challenges (2) • Epitaxial layers in compound semiconductors engineering to relieve stress in heteroepitaxy • Non-linear and 3D Electromagnetic models for accurate design and simulation • Difficulty and cost of integrating various analog/RF and digital functions on a chip or in a module • CAD solution for Integrated Radio SIP design (chip, passive, component, package, tool compatibility, model accuracies)

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