Towards a Framework to Evaluate Performance of the NoCs

1. Mahmoud Moadeli University of Glasgow Towards a Framework to Evaluate Performance of the NoCs

2. System on Chip • Hardware component at very small size have been realized • A large amount of computational power is on single chip • Mobile phones, handheld devices, and…

3. Traditional SoC Nightmare Variety of dedicated interfaces Poor separation between computation and communication. Design and Scalability Complexity Performance!!!!?????

4. On-Chip Networks • Structure • Modularity • Interface

5. What affects the performance of a NoC • Topology • Switching • Routing • IP (Intellectual property) mapping

6. Tools and Techniques Adopted so far • Markovian Techniques (PEPA) • Queuing Networks

7. Problems in using Markovian Models • Models are becoming Prohibitively Large to Develop • Not Scalable • Deriving Measures of Interest is not trivial

8. Adopting Queuing Networks • Appropriate Queuing Models • Extensive Traffic Analysis

9. Performance Aware Description

10. Application Layer • Graphs may represent functional behaviour • Non functional requirements have to be informally specified separately • High level analysis may be performed to optimize the system • The analysis tools may propose a description of the system as architecture level

11. Architecture Layer • System specifications such as routing, switching topology and IP mapping is known • The analysis tools decompose the system to components to enable compositional performance evaluation of the system

12. Composition Layer • The system is described using a compositional approach such as SPA or queuing networks

13. Performance Analysis Layer • The actual analysis is carried out in this layer • Available queuing models have been verified for only simplest traffics • The credibility of the models has to be researched for more realistic traffic

14. Thank you!