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CS 3501 - Chapter 3 (3A and 10.2.2)

CS 3501 - Chapter 3 (3A and 10.2.2). Dr. Clincy Professor of CS. Dr. Clincy. Lecture. Slide 1. Half Adder - Combinational Circuits. Combinational logic circuits give us many useful devices. One of the simplest is the half adder , which finds the sum of two bits.

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CS 3501 - Chapter 3 (3A and 10.2.2)

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  1. CS 3501 - Chapter 3 (3A and 10.2.2) Dr. Clincy Professor of CS Dr. Clincy Lecture Slide 1

  2. Half Adder - Combinational Circuits • Combinational logic circuits give us many useful devices. • One of the simplest is the half adder, which finds the sum of two bits. • We can gain some insight as to the construction of a half adder by looking at its truth table, shown at the right. Lecture

  3. Full Adder - Combinational Circuits • We can change our half adder into to a full adder by including gates for processing the carry bit. • The truth table for a full adder is shown at the right. Lecture

  4. Adders - Combinational Circuits • Just as we combined half adders to make a full adder, full adders can be connected in series. • The carry bit “ripples” from one adder to the next; hence, this configuration is called a ripple-carryadder. Today’s systems employ more efficient adders. Lecture

  5. Decoder - Combinational Circuits • Among other things, they are useful in selecting a memory location according to a binary value placed on the address lines of a memory bus. • This is what a 2-to-4 decoder looks like on the inside. If x = 0 and y = 1, which output line is enabled? Output - Decoded message Input - Encoded message Lecture

  6. Decoder – another example Lecture

  7. Multiplexer - Combinational Circuits • A multiplexer does just the opposite of a decoder. • It selects a single output from several inputs. • This is what a 4-to-1 multiplexer looks like on the inside. Depending the “select input” combination, 1 of 4 data inputs is chosen for output If S0 = 1 and S1 = 0, which input is transferred to the output? Lecture

  8. Multiplexer - Combinational Circuits Can also use multiplexers to implement logic functions Given this truth table, group X1,X2 being 00, 01, 10 and 11 – notice what happens with X3 • 3-input truth table can be done with a 4-input mux • 4-input truth table can be done with a 8-input mux • 5-input truth table can be done with a 16-input mux • Etc.. Also explain how the Mux is used to implement data comm’s FDM and TDM Lecture

  9. 10.2.2 - Programmable Logic Devices (PLD) All possible combinations of inputs ANDed       ••• All possible combinations of ANDed inputs ORed       Re-explain Sums of Products and relationship to PLDs Lecture

  10. 10.2.2 - Programmable Logic Array (PLA) Ability to program a PLD, is called a PLA Lecture

  11. 10.2.2 - Programmable Array Logic (PAL) For a PLA, both the AND array and OR array are programmable For a PAL, the AND array is programmable and the OR array is fixed Lecture

  12. 10.2.2 - Complex Programmable Logic Devices (CPLDs) CPLDs are comprised of 2 or more PALs Lecture

  13. 10.2.2 - Field Programmable Gate Arrays (FPGAs) PAL chips are somewhat limited in size due to the fact they have output pins for each sum-of-product circuit FPGA overcome this size limitation by using a general interconnection. General interconnection PAL Lecture

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