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Lecture 7

Lecture 7. Basic Circuit Analysis Definitions: Circuits, Nodes, Branches Kirchoff’s Current Law (KCL) Kirchoff’s Voltage Law (KVL) Examples and generalizations Series and Parallel Configuration. BRANCHES AND NODES. Branch: elements connected end-to-end,

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Lecture 7

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  1. Lecture 7 • Basic Circuit Analysis • Definitions: Circuits, Nodes, Branches • Kirchoff’s Current Law (KCL) • Kirchoff’s Voltage Law (KVL) • Examples and generalizations • Series and Parallel Configuration

  2. BRANCHES AND NODES Branch: elements connected end-to-end, nothing coming off in between (in series) Node: place where elements are joined

  3. NOTATION: NODE VOLTAGES The voltage drop from node X to a reference node (ground) is called the node voltage Vx. Example: R in out + + Vout C Vin - - ground

  4. KIRCHOFF’S CURRENT LAW Circuit with several branches connected at a node: KIRCHOFF’s CURRENT LAW “KCL”: (Sum of currents entering node)  (Sum of currents leaving node) = 0 Charge stored innode is zero (e.g. capacitor is part of a branch) Assume zero capacitance from node to ground unless explicit capacitor

  5. USING KCL Kirchhoff’s Current Law (KCL) Formulation 1: Sum of currents entering node = sum of currents leaving node Use reference directions to determine “entering” and “leaving” currents--no concern about actual current directions • KCL yields one equation per node

  6. ALTERNATIVE KCL FORMULATIONS • Formulation 2: • “Algebraic sum” of currents entering node = 0 • where “algebraic sum” means currents leaving are included with a minus sign • Formulation 3: • “Algebraic sum” of currents leaving node = 0 • where currents entering are included with a minus sign

  7. MAJOR IMPLICATION KCL tells us that all of the elements in a single branch carry the same current. We say these elements are in series. Current entering node = Current leaving node i1 = i2

  8. 24 = 10 + (4) + i i = 18 A KIRCHHOFF’S CURRENT LAW EXAMPLE Currents entering the node: 24 A Currents leaving the node: 4 A + 10 A + i Three statements of KCL EQUIVALENT

  9. Physics 7B GENERALIZATION OF KCL Sum of currents entering and leaving a closed surface is zero Could be a big chunk of circuit in here, e.g., could be a “Black Box” Note that circuit branches could be inside the surface. The surface can enclose more than one node!

  10. Another example 50 mA i? KIRCHHOFF’S CURRENT LAW USING SURFACES Example surface 5mA entering leaving i=7mA 2mA i i must be 50 mA

  11. R1 X + V1 R2 - C1 KCL: (V1 - vX)/R1 = vX/R2 + CdvX/dt KCL EXAMPLE: DIFFERENTIAL EQUATION At node X: Current into X from the left: (V1 - vX)/R1 Current out of X to the right: vX/R2 + CdvX/dt Given V1, This differential equation can be solved for vX(t).

  12. Path Path + - “rise” or “step up” (negative drop) “drop” V V 2 1 + - KIRCHHOFF’S VOLTAGE LAW (KVL) The algebraic sum of the voltage drops around any closed loop is zero. Why? We must return to the same potential (conservation of energy). Closed loop: Path beginning and ending on the same node Remember our trick: to sum voltage drops on elements, look at the first sign you encounter on element when tracing path

  13. Examples of three closed paths: v2 v3 +  +  + 2 1 +  +  va vb - vc 3 ref. node KVL EXAMPLE Path 1: Path 2: Path 3:

  14. Antennas are designed to “pick up” electromagnetic waves “Regular circuits” often do the same thing  not desirable! +  UNDERLYING ASSUMPTIONS OF KVL Assume no time-varying magnetic flux through the loop … if there was, Physics 7B  Faraday’s Law  induced emf (voltage) Avoid open loops! How do we deal with antennas (EECS 117A)? Include a voltage source as the circuit representation of the emf or “noise” pickup (we have a lumped model rather than a distributed (wave) model)

  15. ALTERNATIVE STATEMENTS OF KIRCHHOFF’S VOLTAGE LAW 1) For any node sequence A, B, C, D, …, M around a closed path, the voltage drop from A to M is given by 2) For all pairs of nodes i and j, the voltage drop from i to j is where the node voltages are measured with respect to the common node.

  16. MAJOR IMPLICATION KVL tells us that any set of elements which are connected at both ends carry the same voltage. We say these elements are in parallel. KVL clockwise, start at top: Vb – Va = 0 Va = Vb

  17. I ? R 1 R 2 + VSS  R 3 R 4 RESISTORS IN SERIES Resistors in series can be made into one equivalent resistor (for easier analysis) • KCL tells us same current flows through every resistor • KVL tells us • Clearly, So we replace the resistors with one, of resistance Works for any # of R!

  18. I I 2 1 ISS R R 2 1 RESISTORS IN PARALLEL Resistors in parallel can be made into one equivalent resistor (for easier analysis) x • KCL tells us • Iss = I1 + I2 • The two resistors are in parallel; they have the same voltage • Vx = I1 R1 = I2 R2 ground Iss = Vx / R1 + Vx / R2 Vx = Iss R1 R2 / (R1+R2) Generally, Req = (R1-1 + R2-1 + R3-1 + …)-1

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