1 / 30

DSPs in Wireless Communication Systems

DSPs in Wireless Communication Systems. Vishwas Sundaramurthy {vishwas@rice.edu} Electrical and Computer Engineering Department, Rice University, Houston,TX. Organization. What are DSPs? Comparison with other processors DSPs in Wireless communications Prototyping using DSPs

Download Presentation

DSPs in Wireless Communication Systems

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. DSPs in Wireless Communication Systems Vishwas Sundaramurthy {vishwas@rice.edu} Electrical and Computer Engineering Department, Rice University, Houston,TX.

  2. Organization • What are DSPs? • Comparison with other processors • DSPs in Wireless communications • Prototyping using DSPs • use of DSP boards • Fixed point analysis • We use DSPs for …

  3. What are DSPs? • Digital Signal Processors • Optimized for signal processing • Work on a stream of data from the external world • “Real-Time” operation • Power efficient • Low cost

  4. Why DSPs? • Digital signal processors Vs. Analog components • No variation in behavior with external factors • Easy duplication of specifications • Flexibility in setting parameters

  5. MAC - Multiply Accumulate X + DSPs Vs. general purpose processors • Harvard Architecture • Von Neumann Architecture Processor Core Processor Core Address Buses Address Bus Data Bus Data Buses Memory - B Memory - A Memory • Expensive • Faster clock speeds • Single cycle multiply

  6. D D D X X X X + + + Use of MACs Eg. - FIR filter

  7. Program “flow” • Data flow • Real time Section - A Function - B DSP Data In Data Out Section - C • Simpler Programming • High level languages • Flexibility to programmer • Coding in “C” • Optimization in assembly • Cool! • Hot! DSPs Vs. GPPs • Fixed point versions

  8. Application Areas in Wireless Communication Systems • Digital cellular phones • Cellular base stations • Wireless data applications • Wireless local loops • Cordless phones • Pagers • GPS systems

  9. DSP A Cellular Handset RECEIVER Detection A to D Channel Decoding Switch Demodulation Source decoding RF Amplification & De/Modulation Speaker Mic. Source Coding Modulation Channel Coding Spreading D to A TRANSMITTER RF section A/D conv. Baseband section

  10. DSPs DSPs A Cellular Base-station TRANSMITTER (RF) K users CHANNEL CODING MODULATION SOURCE CODING SPREADING Noise SWITCHING DETECTOR DECODER A/D DEMODULATION (RF) CHANNEL ESTIMATOR MULTIUSER RECEIVER

  11. System-on-a-chip Solutions Other logic RAM & ROM demodulator and synchronization mP core control keypad interface protocol A voice recognition de- interleaver DSP core Analog D Viterbi decoder speech decoder down conversion

  12. Algorithm development: high-level evaluation to DSP implementation DSP Algorithm to be implemented Algorithm Implemented using C - CODE Algorithm Implemented as a MATLAB program Algorithm implemented using a block diagram tool (SIMULINK) MATLAB Compiler C-code generator C - CODE C - CODE DSP CODE GENERATION TOOLS C - CODE C - Compiler Assembler ASM-CODE MACHINE LANGUAGE Linker DSP EXECUTABLE DOWNLOADED TO DSP DSP DEBUGGER Watch registers and memory

  13. Design flow for ASIC implementation COSSAP/SPW based analysis Fixed point analysis of blocks VHDL DSP function library VHDL description and simulation : Eg. Mentor Graphics' ModelSim VLSI design tools: area estimate : Eg. Synopsis' Design Compiler

  14. Example: Adaptive Filtering Algorithms • Interference cancellation in the synchronous downlink by channel equalization r(t) Chip- matched filter x(i+F) x(i+1) x(i) x(i-1) x(i-F) Discretize ... ... AN-1 AN-2 A1 A1* AN-2* AN-1*  Training Sequence z(i) Compare Update Coefficients

  15. Griffith's Chip Estimator Received downlink signal model: r : received signal H: channel and pulse shaping filter response u : signal elements n : noise Griffith's chip estimator Correlator Channel impulse response Estimate for u(i) (filter output): Adaptive filter coefficients with Filter coefficient (without preamble)

  16. x ... k -1 -1 -1 Z Z Z ... w w w e e e k 0k k 1k k Lk + + y k S LMS-filter VHDL Model Filter Output: Filter coefficients update: Wk: filter weight vector m: gain constant, ek = dk - yk: the error, Xk : the input sample vector dk : the desired response.

  17. Reference system • Downlink simulations in COSSAP Add Pilot Interleaving Channel Encoding Bit Source Base station transmitter (spreading and scrambling) 3-path Raleigh fading channel Interfering users AWGN Chip-matched filter Griffith's chip estimator De-spreading De-interleaving Decoding Channel estimate Statistics

  18. Fixed-point Analysis • COSSAP based simulation analysis • Fixed-point version of of the Adaptive filter only Cossap block diagram Griffith's Algorithm (integer) Floating-point to integer integer to Floating-point

  19. MAC Fixed-point Scaling W_I, W_q (^214) Fil_i, Fil_q (^222 ) (^216 ) (^224 ) W(+)_i, W(+)_q (^242 ) Downscale (v 228) Downscale (v 26) X X_i, X_q (^28 ) Step-Size (^ 218) ALU-1 Filter update ALU-2 Coefficient Update

  20. Fixed-point Scaling Observed signal range: • chip matched filter output : –50 to +50 • channel coefficients: -0.5 to 0.5 16 bits 9 bits 9 bits 17 bits

  21. Signal widths

  22. VLIW Architecture 1600 MIPS Peak 256 KB SRAM 8 MB DRAM PCI Interface TI TMS320C6201 Development System

  23. TI TMS320C6X architecture

  24. Wideband W-CDMA Simulation Testbed What we do with DSPs... • Develop an integrated software testbed • Unified framework to evaluate new algorithms for coding, synchronization, detection, etc. • Hardware/Software Co-Design Simulink, Matlab, “C” • Simulation Acceleration

  25. CDMA Wireless Link User’s data bits K users SOURCE CODING CHANNEL CODING SPREADING MODULATION TRANSMITTER Noise Detected bits of K users DETECTOR DECODER DEMODULATION CHANNEL ESTIMATOR RECEIVER

  26. CDMA Wireless System Testbed Simulink Version Multiuser Detection Chip matched filter AWGN Channel Error Rate Calculation Chip MF Wireless Channel User_Data Multiuser Detector Decorrelating Error Counter Detector Channel Estimation Channel Estimation User Data Max. Likelihood Channel Est. Show Stats Update Parameters Parameters Statistics

  27. C - Code Matlab Code Block Diagram Libraries Algorithms Simulink Workstation RTW generated C - Code DSP Code Generation Tools DSP hardware Prototyping Methodology Display and Analysis of Data With RTW support for DSP hardware

  28. Current Infrastructure • 400MHz Pentium PC host • Two TI TMS320C6201 DSP Development Boards (EVMs) • Optimizing “C” compiler and code generation tools • MS Visual Studio development environment

  29. Future Environment • PCI TIM (TI C40 Module) carrier • C62/C67 DSP TIMs • Xilinx Virtex FPGA module

  30. Summary • What are DSPs? + Special features • Issues in algorithm development on DSP boards • Prototyping • Fixed Point Analysis • DSPs in Wireless communications • DSPs in the wireless testbed project

More Related