1 / 16

Choice for the rest of the semester

Choice for the rest of the semester. Old Plan Machine language in great detail Flow charts Assembly language Memory access Branches Traps Interrupts I/O Stacks Subroutines Assembly programming Process management. New Plan assembler and machine language Operating systems

jerod
Download Presentation

Choice for the rest of the semester

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Choice for the rest of the semester • Old Plan • Machine language in great detail • Flow charts • Assembly language • Memory access • Branches • Traps • Interrupts • I/O • Stacks • Subroutines • Assembly programming • Process management • New Plan • assembler and machine language • Operating systems • Process scheduling • Memory management • File system • Optimization and Pipelining • Comparison UNIX Windows … • Software tools: compiler, interpreter, shell … • ?

  2. Review Von Neumann • 3 main parts of computer architecture • CPU, Memory, Control + I/O • Program is saved like data in Memory • In particular: program is binary: machine language • Instruction cycle • Fetch • Decode • Get operands (memory address or numeric) • Execute • Store results

  3. Instruction Set Architecture • Interface between hardware and software • 2 Levels of instruction: • Machine language: binary • Assembly language: lowest level human readable programming language • Translator between Machine and Assembly: Assembler • Every processor type has its own ISA • Intel: IA-32, IBM& Motorola: PowerPC • ISA can differ in • Number of different instruction, • Length • Number of parameter

  4. ISA Design • ISA links the hardware and the machine language • Design decision in hardware are reflected in machine language • What operations do you support? • If DR can take 8 values (you have 8 temporal register) how many bits do you need to encode DR? • If Imm is 5 bit 2C, what is the range of possible summands for immediate addition? • If you have 20 commands, how big is the Opcode field?

  5. Hardware Bus Control Unit Set of 8 temporal registers: R0,…,R7 CPU Memory

  6. Instruction Types • Logic (AND: 2 types, NOT) • Arithmetic (ADD: 2 types) • Memory Read (LD, LDI, LDR, LEA) • Memory Store (ST, STI, STR) • Branch (BR) • Subroutine (JSR, JSRR, RET) • Special (TRAP, RTI) • Note: the uppercase words are assembly commands, not machine language

  7. Machine Language Table 5.1 in Book on page 94

  8. Example 1: ADD • Bits 15:12  ADD • Bits 11:9  DR= Register 6, store result in R6 • Bits 8:6  SR1=Register 2, first operand in R2 • Bit 5=0  Second operand is register, not Imm • Bits 2:0  SR2= Register 6 • Bits 4:3: no meaning • Assembler: ADD R6, R2, R6

  9. Memory Addressing • 4 Addressing types (3 for store, 4 for load) • Immediate (LEA) only for load • Returns address • Direct Mode (ST, LD) • Returns value from address in instruction • Indirect Mode (LDI, STI) • Returns value from address from address in instruction • Base Offset (LDR, STR) • Returns value from address in register plus offset (If you want I can give you more details)

  10. Why are there multiple modes? • To enable more efficient programming • Base offset for array access • Immediate to initialize array access • Indirect for complex structures (records) • Direct for simple variables • But the hardware to support this modes has to be more complex!

  11. Example 2: Branch • N,Z,P are condition codes that are set by the ALU during the execution of previous command • In the example N is 1 and Z,P are 0, the branch will be taken only if the previous command produced a negative result (first bit = 1 in 2C) • The page offset determines to which address (to branch to Assembler: BRn Label

  12. Assembler and Variables • Human don’t like to write binary programs • In both cases, memory and branching, we needed addresses, but where do they come from? • The assembler creates them • Assembler: software program that translates from assembly language to machine language (binary) and variables and labels into binary addresses

  13. Assembly program ; Comment starts with ; ; Program to multiply a number by the constant 6 ; .ORIG x3050 ; tells the assembler where in memory to start LD R1,SIX ; load the value of variable SIX into register 1 LD R2,NUMBER ; load value of variable NUMBER into register 2 AND R3,R3,#0 ; Clear R3. It will contain the product. AGAIN ADD R3,R3,R2 ; loop, add NUMBER to current result in R3 ADD R1,R1,#-1 ; decrement loop counter BRp AGAIN ; As long as R1 positive go back to AGAIN HALT ; Stop when done NUMBER .FILL x0004 ; reserve memory location for variables SIX .FILL x0006 ; reserve memory location for variables .END

  14. Machine program 0010001001011000 0010010001010111 0101011011100000 0001011011000010 0001001001111111 0000001001010011 1111000000100101 0000000000000100 0000000000000110 LD R1,SIX LD R2,NUMBER AND R3,R3,#0 ADD R3,R3,R2 ADD R1,R1,#-1 BRp AGAIN HALT ; NUMBER .FILL x0004 SIX .FILL x0006

  15. Simulator Demonstration

  16. What you should be able to do: • Read a assembler program • Translate a machine instruction into assembler using the table • Answer the question “What is an assembler” • Understand the relationship between hardware and ISA design

More Related