1 / 15

Characterization Presentation Enhanced Ethernet Card Project num. 1523 Students: Alex Shpiner

landry
Download Presentation

Characterization Presentation Enhanced Ethernet Card Project num. 1523 Students: Alex Shpiner

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. 22.05.04הטכניון - מכון טכנולוגי לישראל הפקולטה להנדסת חשמל המעבדה למערכות ספרתיות מהירות Characterization Presentation Enhanced Ethernet Card Project num. 1523 Students:Alex Shpiner Eyal Azran Supervisor:Boaz Mizrahi

  2. Present Architecture P L X FPGA M A C P H Y E T H E R N E T P C I Current Main Features: • Transmitting and Receiving Ethernet frames • MAC and PHY configuration control

  3. Present FPGA Block Diagram P C I B R I D G E PHY C I F GNR MCF M A C TRN Shared bus ARB RCV

  4. Project’s goals: • Automatic ping reply

  5. Project’s goals: • Automatic ping reply • Real time Packet analyzer & data collector

  6. Project’s goals: • Automatic ping reply • Real time Packet analyzer & data collector • Real time Network Testing Unit:

  7. Project’s goals: • Automatic ping reply • Real time Packet analyzer & data collector • Real time Network Testing Unit: • Predefined transmit rate

  8. Project’s goals: • Automatic ping reply • Real time Packet analyzer & data collector • Real time Network Testing Unit: • Predefined transmit rate • Accurate measurement of response time

  9. Project’s goals: • Automatic ping reply • Real time Packet analyzer & data collector • Real time Network Testing Unit: • Predefined transmit rate • Accurate measurement of response time • Testing parameters are predefined by user

  10. FPGA Architecture C I F M A C TRP TRN Shared bus ARB RCV RCP * Configuration units (GNR, MCF) are not shown on this diagram

  11. TRP RCP – Receive Processing Unit C I F R C V RCP Packet Analyzer Regular Packets Received Data Collector

  12. TRP – Transmit Processing Unit C I F T R N TRP Regular Packets to be transmitted TRN Arbiter RCP Echo Request Parameters Echo Request Generator Echo Reply Creator

  13. Project Achievements • Learning network protocols (Ethernet, IP, Echo). • Experience in advanced VHDL. • Appropriate unit design and simulation. • Organized work and documentation.

  14. Approximated Time Table March 2004 Learning the Network Protocols Architecture Design and Algorithms Development April 2004 May to June 2004 Writing the code and simulation Jule 2004 Synthesis & Debug Final Presentation and Project Book Submitting August 2004 Time line

  15. Thanks

More Related