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ILC Tracking R&D at SCIPP

A summary of the SCIPP/UCSC ILC R&D program, including developments in the LSTFE ASIC, SiD KPIX/Double-Metal design, and charge division for silicon strip sensors.

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ILC Tracking R&D at SCIPP

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  1. ILC Tracking R&D at SCIPP SiD Workshop Thursday, June 3 2010 Bruce Schumm Santa Cruz Institute for Particle Physics

  2. The SCIPP/UCSC ILC R&D GROUP Faculty/Senior Vitaliy Fadeyev Bruce Schumm Collaborators Rich Partridge Takashi Maruyama Tom Markiewicz (SLAC) Students Alex Bogert** Jerome Carman* London Chappel… Kelsey Collier Spencer Key Donish Khan Omar Moreno Jared Newmiller Dale Owens Sheena Schier Matt Stanton Dustin Stolp* Aaron Taylor Capella Yee Lead Engineer: Ned Spencer Technical Staff: Max Wilder Forest Martinez-McKinney *2010 Senior thesis (graduation requirement) !Carman thesis wins Chancellor’s Award! ** CERN will support summer 2010

  3. OUTLINE OF SCIPP ILC R&D PROGRAM • LSTFE Front-End ASIC • Optimized for ILC (long ladders for barrel; high rates for forward tracking) • Applicable to both SiD and ILD • SiD KPIX/Double-Metal Development • SiD baseline; alternative to LSTFE • SCIPP has done group’s sensor testing, now beginning critical systems tests

  4. OUTLINE (Continued) • Fundamental (“Generic”) R&D • Use of charge division for longitudinal coordinate (with Rich Partridge) • Solid-state noise sources • SiD Simulation Projects (Not in talk) • Tracking and momentum reconstruction validation • Non-prompt signatures

  5. The LSTFE ASIC

  6. The LSTFE ASIC Process: TSMC 0.25 m CMOS 1-3 s shaping time (LSTFE-I is ~1.2 s); analog measurement is Time-Over-Threshold

  7. Li Hi Li+1 Hi+1 Li+2 Hi+2 Li+3 Hi+3 Li+4 Hi+4 Li+5 Hi+5 Li+6 Hi+6 Proposed LSTFE Back-End Architecture Low Comparator Leading-Edge-Enable Domain 8:1 Multi-plexing (clock = 50 ns) FIFO (Leading and trailing transitions) Event Time Clock Period  = 400 nsec

  8. LSTFE-II Prototype Optimized for 80cm ladder (ILD barrel application) Institute “analog memory cells” to improve power-cycling switch-on from 30 msec to 1 msec (problems!) Improved environmental isolation Additional amplification stage to improve S/N, control of shaping time, and channel-to-channel matching Improved control of return-to-baseline for < 4 mip signals (time-over-threshold resolution) 128 Channels (256 comparators) read out at 3 MHz, multiplexed onto 8 LVDS outputs Testing underway in SCIPP lab

  9. LSTFE-II Performance: Time-Over-Threshold vs. Injected Charge Omar Moreno

  10. Use of KPiX as a Tracking Chip

  11. The SiD KPIX/Double-Metal Baseline Design 10cm2 modules tessellate the five barrel tracking layers Traces on 2nd (surface) metal layer to two 1024-node bump-bonding arrays

  12. SCIPP attempting to explore whether Mounting KPiX on surface of sensor leads to digital  analog feed-through It has proved difficult to mount KPiX7 onto prototype sensors (passivation between two metal layers fails during bonding) Forest M.M.: Arranged for bonding with private firm (H&K); then cut shorted traces with laser

  13. Connectivity After Severing Traces Pad to Pad old R(Ohms) New R(Ohms) --------------------------------------------- AVdd to CLK(-) 74.8 3.4M AVdd to CLK(+) 174.2 3.2M AVdd to DVdd 29.6 40K Vref to AGND 2.7 101.1 Vref to DGND 14.6 102 AGND to DGND 16 12.6** DVDD to CLK(-) 75.1 1.4M DVDD to CLK(+) 173.3 1.6M **This ohmic connection seems to be through the IC and is not from damage during bonding. Next step: build enclosure for assembly and begin to read out (summer)

  14. Triggering on Minimum-Ionizing Particles

  15. 10fC injected 9fC injected 8fC injected Example channel 63 Mean Threshold: 4fC injected Threshold corresponding to the average pulse height for the given injected charge.

  16. offset gain Charge in Coulombs Example Channel 63

  17. 0-Charge Input Offset (mV) by Channel Gain ~4 mV/fC (x10) Offset in mV for no input charge Next step: Interface with pulse-development simulation to confirm min-I operability

  18. Charge Division for Silicon Strip Sensors

  19. Final step: practical detectors are not isolated strips. Include two nearest-neighbors in simulation: Network effects lead to ~5% reduction in longitudinal resolution.

  20. Readout Noise for Linear Collider Applications

  21. Use of silicon strip sensors at the ILC tend towards different limits than for hadron collider or astrophysical applications: • Long shaping time • Resistive strips (narrow and/or long) But must also achieve lowest possible noise to meet ILC resolution goals. • How well do we understand Si strip readout noise, particularly for resistive networks? • How can we minimize noise for resistive networks?

  22. Parallel Resistance Series Resistance Amplifier Noise (parallel) Amplifier Noise (series) Standard Form for Readout Noise (Spieler) Fiand Fv are signal shape parameters that can be determined from average scope traces.

  23. Expected Noise for Custom-Biased L00 Ladder Spieler formula suggests that series noise should dominate for ladders of greater than 5 or so sensors.

  24. CDF L00 Sensor “Snake” CDF L00 “Snake” LSTFE1 chip on Readout Board

  25. Readout Noise Results Relative to prior results, have explored “center-tapping” (reading out from center of chain rather than end. Naïve expectation Expectation with measured shape factors Fi, Fv Measured (end readout) Measured (center-tap)

  26. Summary of Findings Reading out from ladder from end: Significantly less noise observed than expected (network effects ignored in formulation of expectation?) Reading out from middle (“center tap”): Noise seems further reduced (~20%) for lengths for which series noise dominates Will explore with P-SPICE simulation…

  27. AUGUST 2010 MILESTONES • Evaluation of channel-to-channel variations in KPIX-9 • Exploration of attachment of KPIX-7 to prototype sensor using cutting laser to mitigate shorts from over-glass failure • Initial characterization of LSTFE-II chip • Estimation of longitudinal resolution from resistive charge division measurement of readout noise in the series-resistance limit, including both end- and center-readout • Simulation studies supporting the design of a high-fluence electromagnetic radiation damage study of various silicon sensors • Acquisition and characterization of sensor samples to be used in damage studies • Simulation studies of SiD tracking efficiency performance in forward region

  28. AUGUST 2011 MILESTONES • Characterization of 'analog memory' test structures and assessment of suitability for implementation of power-cycling for LSTFE • Assessment of effects of digital/analog interference effect in KPIX/double-metal assembly • PSpice simulation of series-noise readout limit and comparison with observation • Publication of charge-division results • Test-beam study of radiation damage to various silicon sensor types • Simulation studies of SiD momentum reconstruction performance in forward region

  29. AUGUST 2012 MILESTONES • Re-optimization (for forward region) and fabrication of LSTFE ASIC. • Follow-up testbeam run to confirm radiation hardness of selected Si sensor • Determination of radial extent of sensitivity for reconstruction kinks fro stau decay in the SiD detector • KPiX/double-metal yield and reliability studies

  30. Simulation Studies (ILC Detector Performance)

  31. CURVATURE RECONSTRUCTION PERFORMANCE • Compare width of Gaussian fit to residuals with two different estimates: • Error from square root of appropriate diagonal error matrix element • Error from Billoir calculation (LCDTRK program) • 2. Only tracks with all DOF (5 VTX and 5 CT layers) are considered. • 3. Require |cos| < 0.5 • Mixture of q/qbar at 500 and 1000 GeV, tau samples at 500 GeV; also use single muons

  32. CURVATURE ERROR vs. CURVATURE Gaussian fit SiD02 Detector Model LCDTRK calculation (no beam constraint)

  33. Results for Stiff, Central Tracks • In terms of p/p, comparing , with p=100 GeV and |cos| < 0.5 we find •   • LCDTRK 0.28% 0.28% • Residuals 0.37% 0.39% • LOI Result 0.33% ---- • Delhi group (Kirti Ranjan et al.) looking into developing Kalman Filter fitter

  34. SiD Forward Tracking Efficiency Start in central region (|cos| < 0.7); establish Pt cut of 2.0 GeV/c Capella Yee, Scotts Valley High School

  35. Exploring Higher Values of cos Capella Yee Pt > 2.0 0.7 < Pt < 2.0 Note: Horizontal axis is -|cos| (learning how to move stat box!)

  36. 3-Hit Tracks & Non-Prompt Signatures Probably need 5+1 layers for prompt track If we require 4 hits for non-prompt tracks, sensitive region for kinked tracks is very limited.

  37. e.g.: Position-matching for isolated muons (mm) Non-Prompt Tracks and GMSB SCIPP algorithm for non-prompt tracks: match 3-hit seeds from tracker with stubs from calorimeter (developed by undergrads Meyer ( U. Chicago), Rice ( UC Irvine) • Approximately 60% for 3-hit tracks in Z  qq events • Being optimized for non-prompt recon-struction (GMSB signature) by undergraduates Stolp and Bogert.

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