1 / 20

ENGIN 112 Intro to Electrical and Computer Engineering Lecture 14 Binary Adders and Subtractors

ENGIN 112 Intro to Electrical and Computer Engineering Lecture 14 Binary Adders and Subtractors. Overview. Addition and subtraction of binary data is fundamental Need to determine hardware implementation Represent inputs and outputs Inputs: single bit values, carry in Outputs: Sum, Carry

ludlow
Download Presentation

ENGIN 112 Intro to Electrical and Computer Engineering Lecture 14 Binary Adders and Subtractors

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. ENGIN 112Intro to Electrical and Computer EngineeringLecture 14Binary Adders and Subtractors

  2. Overview • Addition and subtraction of binary data is fundamental • Need to determine hardware implementation • Represent inputs and outputs • Inputs: single bit values, carry in • Outputs: Sum, Carry • Hardware features • Create a single-bit adder and chain together • Same hardware can be used for addition and subtraction with minor changes • Dealing with overflow • What happens if numbers are too big?

  3. A B S C 0 0 0 1 A 0 S 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 B 0 C 1 Dec Binary 1 1 +1 +1 2 10 Half Adder • Add two binary numbers • A0 , B0 -> single bit inputs • S0 -> single bit sum • C1 -> carry out

  4. A3 A2 A1 A0 B3 B2 B1 B0 0 1 0 1 0 1 1 1 A B Ci+1 Ci 0 1 0 1 0 1 1 1 1 1 1 Ai +Bi A B Si 1 1 0 0 Multiple-bit Addition • Consider single-bit adder for each bit position. Each bit position creates a sum and carry

  5. AiBi Ci Ai Bi Si Ci+1 00 01 11 10 Ci 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 1 1 0 1 1 1 Si Full Adder • Full adder includes carry in Ci • Notice interesting pattern in Karnaugh map.

  6. Ci Ai Bi Si Ci+1 Si = !Ci & !Ai & Bi # !Ci & Ai & !Bi # Ci & !Ai & !Bi # Ci & Ai & Bi 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Full Adder • Full adder includes carry in Ci • Alternative to XOR implementation

  7. Si = !Ci & !Ai & Bi # !Ci & Ai & !Bi # Ci & !Ai & !Bi # Ci & Ai & Bi Si = !Ci & (!Ai & Bi # Ai & !Bi) # Ci & (!Ai & !Bi # Ai & Bi) Si = !Ci & (Ai $ Bi) # Ci & !(Ai $ Bi) Si = Ci $ (Ai $ Bi) Full Adder • Reduce and/or representations into XORs

  8. AiBi Ci Ai Bi Si Ci+1 00 01 11 10 Ci 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 1 0 1 1 1 1 Ci+1 Full Adder • Now consider implementation of carry out • Two outputs per full adder bit (Ci+1, Si) Note: 3 inputs

  9. AiBi Ci Ai Bi Si Ci+1 00 01 11 10 Ci 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 1 0 1 1 1 1 Ci+1 Ci+1 = Ai & Bi # Ci & Bi # Ci & Ai Full Adder • Now consider implementation of carry out • Minimize circuit for carry out - Ci+1

  10. Full Adder Ci+1 = Ai & Bi # Ci !Ai & Bi # Ci & Ai & !Bi Ci+1 = Ai & Bi # Ci & (!Ai & Bi # Ai & !Bi) Ci+1 = Ai & Bi # Ci & (Ai $ Bi) Recall: Si = Ci $ (Ai $ Bi) Ci+1 = Ai & Bi # Ci & (Ai $ Bi)

  11. Half-adder Half-adder Full Adder • Full adder made of several half adders Si = Ci $ (Ai $ Bi) Ci+1 = Ai & Bi # Ci & (Ai $ Bi)

  12. Full Adder • Hardware repetition simplifies hardware design A full adder can be made from two half adders (plus an OR gate).

  13. Block Diagram Full Adder • Putting it all together • Single-bit full adder • Common piece of computer hardware

  14. C 1 1 1 0 A 0 1 0 1 B0 1 1 1 S 1 1 0 0 4-Bit Adder • Chain single-bit adders together. • What does this do to delay?

  15. 110 = 0116 = 00000001 -110 = FF16 = 11111111 12810 = 8016 = 10000000 -12810 = 8016 = 10000000 Negative Numbers – 2’s Complement. • Subtracting a number is the same as: • Perform 2’s complement • Perform addition • If we can augment adder with 2’s complement hardware?

  16. +1 Add A to B’ (one’s complement) plus 1 4-bit Subtractor: E = 1 That is, add A to two’s complement of B D = A - B

  17. Adder- Subtractor Circuit

  18. AN-1 BN-1 Overflow? CN-1 Assumes an N-bit adder, with bit N-1 the MSB Overflow in two’s complement addition • Definition: When two values of the same signs are added: • Result won’t fit in the number of bits provided • Result has the opposite sign.

  19. Addition cases and overflow 00 0010 0011 -------- 0101 01 0011 0110 -------- 1001 11 1110 1101 -------- 1011 10 1101 1010 -------- 0111 00 0010 1100 -------- 1110 11 1110 0100 -------- 0010 -3 -6 7 2 -4 -2 -2 4 2 2 3 5 3 6 -7 -2 -3 -5 OFL OFL

  20. Summary • Addition and subtraction are fundamental to computer systems • Key – create a single bit adder/subtractor • Chain the single-bit hardware together to create bigger designs • The approach is call ripple-carry addition • Can be slow for large designs • Overflow is an important issue for computers • Processors often have hardware to detect overflow • Next time: encoders/decoder.

More Related