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Object-Oriented VHDL W/G

Object-Oriented VHDL W/G. Scope to extend VHDL to allow object-oriented and generic modeling of electronic systems abstract data types, inheritance, polymorphism, and genericity of types Purpose significant potential for reuse in designs and testbenches

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Object-Oriented VHDL W/G

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  1. Object-Oriented VHDL W/G • Scope • to extend VHDL to allow object-oriented and generic modeling of electronic systems • abstract data types, inheritance, polymorphism, and genericity of types • Purpose • significant potential for reuse in designs and testbenches • managing increasing complexity of designs • increase productivity of design engineers FDL-2000 - DASC Plenary - Peter J. Ashenden

  2. Proposals for Extending VHDL • Objective VHDL • data modeling extensions like C++ & Java • adds entity/architecture inheritance • SUAVE • data modeling extensions based on Ada-95 • adds OO, genericity, abstract communication • IEEE OOVHDL Working Group • develop a Trial Use Standard for OOVHDL • start with Objective VHDL, and adopt SUAVE features as appropriate • Potential for input or adoption into VHDL-200x FDL-2000 - DASC Plenary - Peter J. Ashenden

  3. Status & Contacts • Starting technical work on language definition • For info • www.eda.org/oovhdl • subscribe to oovhdl email list • Contact • Peter Ashenden <peter@ashenden.com.au> FDL-2000 - DASC Plenary - Peter J. Ashenden

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