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SNN 519

SNN 519. TSR-QD Based Memory Devices. Presenters: Hai Nguyen Sasha Bakhru Sumit Kumar. May 07, 2004. Company Vision & Mission. Vision : To be the technology leader in the solid state memory, serving computing and consumer electronic industry. Mission :

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SNN 519

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  1. SNN 519 TSR-QD Based Memory Devices Presenters: Hai Nguyen Sasha Bakhru Sumit Kumar May 07, 2004

  2. Company Vision & Mission Vision: To be the technology leader in the solid state memory, serving computing and consumer electronic industry. Mission: To develop world-class non-volatile memory devices and partner with manufacturers & distributors to mass produce & market the products at a competitive price.

  3. Business strategy • Develop a framework for R&D • Generate intellectual property • Introduce new product in pipeline every two (2) years • Current Technology Focus: non-volatile memory devices using by the Tetrahedral-Shaped Recess Quantum Dot technology (TSR-QD)

  4. Memory RAM Hybrid ROM DRAM SRAM NVRAM Flash EEPROM EPROM PROM Masked Types of Memory • RAM – (Random Access Memory) • Volatile memory; Data can be written, changed and deleted • ROM – (Read Only Memory) • Non-volatile, Data erase cycle limited, entire data get erased • Hybrid – Combined features of RAM and ROM • Non-volatile, unlimited read and write cycle • Flash memory has best features – high density, low cost, fast • in reading, durable, low power usage, low writing voltage

  5. Characteristics of various memory types

  6. QD- An overview • Electron confinement in very small dimension leads to quantum effect • types of electron confinement: • Quantum dots – artificial atoms having discrete energy levels • QD can have 1 or 0 as the spin of electron can be up and down • Memory is stored as millions of zeros and ones on the device

  7. Why QD for memory devices • Ultra small size QD so can be operated with just a few electrons and holes • Enormously high device integration due to small size • Low chip power consumption • charge carriers confined in zero dimensional space • Reduced density of states restricts states available for electrons • and holes to tunnel • Number of electrons in dots can be precisely controlled by gate • voltage

  8. Framework for R&D

  9. Process for new product development Product Discussion Briefing / S w/ Mfrs. Market U Assessment M M Design A Develop Analysis R Manuaf. Process Y Apply for Patent D “GO” O Finalize Spec. C “NO-GO” & MOU Product U DECISION BY PARTNERS Testing M E N Marketing Analysis Mfrs. Sign MOU T & Test Products

  10. TSR-QD technology evaluation • Independently change the In-rich InGaAs content at the TSR bottom & thickness of InGaAs during MOCVD growth • Control the dot position in the lateral direction • Vertically align QDs and control the height of each TSR by stacking TSR-QDs • Provide a high uniformity of dot size

  11. TSR-QD fabrication setup • Substrate: GaAs (111)B • Mask: 100 nm thick SiO2 • Etchant: 0.5% Br2-ethanol solution • Method: MOCVD • Sources: TMGa, TMIn, AsH3 • Variables: flow-rate and T

  12. TSR-QD devices • TSR-QD is placed between nonvolatile InGaAs/AlGaAs dope-channel heterostructure FET and gate electrode • Device can be programmed by tunneling electrons through AlGaAs barrier from the gate Substrate: 75 nm thick Si-doped n+-GaAs at 800C & 50 Torr

  13. TSR-QD product advantages • Ultra high memory density at a ultra small space • The discrete energy of QD is confined in zero dimensional space • A single quantum dot can functions as a microelectronic unit • Low power consumption at room temperature

  14. TSR-QD product challenge • Obtain power gain in molecular circuits • Arrange trillions of QDs in devices achieving molecular electronic interfaces • Yield two bits in a space of 0.077 square microns • Develop a low cost process that is suitable for rapid processing manufacturing

  15. baseline TSR-QD product timeline

  16. Financial analysis for TSR-QD Initial Costs Incurred: 1000 sqft clean space Equipment: Furnish lab as conventional semiconductor research facility • Big Items • MOCVD tool • Laser Lithography tool • PECVD tool Total Cost: $1,500,000 Annual Cost of Upkeep: 5,000 sqft laboratory space (lease and maintenance of space) Raw materials Total Cost: $200,000

  17. On-Site Staff Fabrication Analysis Management 2 PhD 5 BS/MS 2 PhD 5 BS/MS 2 PhD 2 MBA 1 JD (PT) Human Resources Annual Pay Levels: PhD: ~ $65,000 MBA: ~ $60,000 JD (Part Time): ~ $50,000 MS: ~ $50,000 BS: ~ $40,000 Total Annual Cost: ~ $1,000,000

  18. Market opportunities • Potentially replace the existing memory technologies ( DRAM, SRAM, Flash, universal memories etc.) • Apply in commercial products (stationary, mobile & portable, transportation, & health care) • Suitable for military and space applications (InfoTech Trends database)

  19. Memory product lifecycle forecast (InfoTech Trends database)

  20. Current QD memory pioneers • Fujitsu Ltd.:Poly-Si materials with Poly-Si QD material using E-beam/etch method • Minnesota: SOI material with Poly-Si QD material using E-beam/etch method • Fujitsu: SOI material with Poly-Si QD material using E-beam/etch method • IBM: SOI material with Poly-Si QD material using E-beam/etch method • Sony: GaAs material with InAs QD material using Epitaxial self assembly method

  21. Conclusions • (cost saving) • (Technology performance) • (Market time)

  22. References

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