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ISIS1 Testbeam

This presentation discusses the preparation work for the ISIS1 testbeam, including the prototype LCFI sensors and the electronics setup. Results from previous tests are also presented.

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ISIS1 Testbeam

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  1. Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 20081 ISIS1 Testbeam EUDET JRA1 Meeting, DESY30th January 2008 Scott MandryLCFI CollaborationUniversity of Bristol

  2. Background Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 20082 • Last autumn we held a three week testbeam at DESY; which started October 15th. • We tested prototype LCFI ISIS1 Sensors. • This is to work towards using LCFI sensors in the EUDET beam telescope as a validation user. • Around 6TB of data was taken. Analysis is ongoing. • Today I will present the work preparing for this testbeam.

  3. Introduction: The ISIS Sensor Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 20083 • In-situ Storage Image Sensor, stores samples in ‘in-pixel’ CCD memory. • Samples stored during bunch-crossings; charge only converted to voltage (& moved off-chip) in between bunch trains.

  4. Introduction: The ISIS Sensor Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 20084 • Prototype LCFI ‘Proof of Principle’ ISIS1 Sensor (produced by e2v). • 16 x 16 pixel device, each 40µm x 160µm. • Mechanical Alignmentcrucial & challenging.

  5. Integrated Sensor Stack Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 20085 • Precision Mechanical Support Structure. • Thermally conductive pads couple heat through to external cooling stage. • OperatingTemperature is ~-20°C

  6. Electronics: Overview Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 20086

  7. Testbeam 1 Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 20087

  8. Testbeam 2 Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 20088 • VME Crate • NI VMEBusInterface. • 3 x CAEN V1724ADC Cards. • LCFI BVM2Sequencer. • BristolFanout Board.

  9. Electronics: ISIS Carrier PCB Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 20089 • Simple RAL Design, modified & produced by Bristol. • Interfaces digital control signals with analogue bias voltages. • CPLD provides ‘soft-wired’ routing of Sequencer control. • CPLD also controls sensor row readout & column multiplexing. • Central apertureto reduceMultiple Scattering.

  10. Electronics: BVM2 Sequencer Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200810 • Base VME Module (v2) providescore of DAQ Hardware. • Low cost modular Oxford/LCFI design. • Dedicated clock circuitry distributes masterclock through entire system. • Sensor control sequence stored in RAM;CCD phases & readout synchronous withthe master clock. • User-definable 32-bit LVDS & TTL-LEMOinterfaces allows for a highly flexible DAQ system. • Spartan II FPGA implements rest offunctionality, including VMEbus communications.

  11. Electronics: Fanout Board Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200811 • Takes Sequencer control signals &‘fans-out’ to/from array of sub-systems: • TLU. • ISIS Carrier PCBs. • V1724 ADCs. • CPLD keeps functionality flexible. • Pin mappings firmware controlled. • Allows debugging functionality. • Allows DAQ topology to be changed duringtestbeam without hardware/firmware mods.

  12. Electronics: Trigger Logic Unit Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200812 • Our good friend.

  13. Firmware Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200813 • CPC (Column Parallel CCD) Sequencer Firmware (Rutherford Appleton Laboratory) • ISIS Sequencer Firmware • Ported CPC Firmware to ISIS. • Developed VMEbus Block Transfer communications system. • Added CAEN V1724 ADC control outputs. • Incorporated triggered readout. • Added DAQ_Busy registers: software run-time control of the readout hardware. • ISIS Fanout Board Firmware • Provides interface bridge between Sequencer and Multiple ISIS Carrier PCBs. • Provides TLU interface. • Added for debugging purposes a TLU Emulator (Trigger & Busy only). • Allows optional system configuration: • 1 plane / 5 planes. • Use real / emulated TLU. • Use triggered / untriggered readout.

  14. Sensor Control Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200814 Timing Diagram - Correlated Double Sampling Phase 1 Phase 2 Phase 3 Readout of pixel 1 from a row RG Four reset samples ISIS Output Four signal samples MUX Advance 1 2 3 4 1 2 3 4 1 ADC Clock ADC Gate • Example of a singlereadout transaction: • Uses Correlated DoubleSampling. • Column multiplexinginterleaves data.

  15. Sensor Control Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200815 • Readout Phase (screenshot from RAL sequence upload program):

  16. Sensor Control Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200816 • Complete Sequence with Integration Phase & Readout:

  17. Results 1 Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200817 • First Bristol ISIS1 Output 28th June 2007 (Using RAL ISIS & PCB)(no DAQ at this stage) • On-’Scope subtractionof pedestal from signal shows light detected. ISIS_output Delay Subtraction

  18. Software Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200818 • Labview Interface to CAEN V1724 ADCs: • Provides ‘Peek and Poke’access to control registers. • Enables low-levelcharacterization of ADCs,essential to building aDAQ Framework. • ‘Practice-Run’ for buildingthe full-scale Labview App.

  19. Software Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200819 • Labview based Data Acquisition Software • Controls the CAEN V1724 ADCs.

  20. Testbeam 3 Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200820 • DAQ Softwarein operation.

  21. Software (& Results 2) Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200821 • Segment of raw lab data, seen on Viewer Applet.

  22. Results 3 Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200822 • Pre-Testbeam Results (Using Fe55 Source): • X-rays detected, good to go.

  23. Results 4 Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200823 x(sensor) vs. x(sensor) y(sensor) vs. y(sensor) • Preliminary DESY Testbeam Results (6 GeV Electrons): • Hit position correlations clearly visible:

  24. Status Scott Mandry, EUDET JRA1 Meeting, DESY 30th January 200824 • Complete first generation Bristol Data Acquisition System for ISIS1 has been successfully developed. • Preliminary results from first DESY testbeam look promising. • Full testbeam analysis currently in-progress. • Another testbeam is planned for this summer. • ISIS1 will be easily integrated into a future EUDET testbeam. • The ISIS principle has been shown to be a viable concept.

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