Division of a process into Pages

1. Division of a process into Pages • Advantages: • Division is easy • Page handling is simple public class Misc { public static int add(int a, int b) {return a+b; } public static int fact(int x) {int f= 1; if (x == 0) f = 1; else f = x* fact(x-1); return f; } public static double smaller(double d1, double d2, double d3, double d4) { double sm = d1; if(d2 < sm) sm = d2; if(d3 < sm) sm = d3; if(d4 < sm) sm = d4; return sm; } public static char smallest(char c1, char c2, char c3) {char s =c1; if (c2 < s) s = c2; if (c3 < s) s = c3; return s; } } Disadvantage: The division of the process is not according to the logical structure of the process

2. Segmentation • In paging, the division of a process is not according to the logical structure of the process. If a process is divided according to its logical structure then the blocks of the process are of different sizes called segments and the corresponding mm scheme is called segmentation. • A segment can be of any length determined by the OS. • The logical address a in segmentation, like paging,is also two dimensional: a = ( s, d) where s is segment numberand d is displacement within the segment and is also called offset. • A segment table is maintained for each process; this contains information about where a segment has been loaded in the main memory. • Each entry into the segment table has two components: limit and base; the base is the starting address of the segment in the RAM and limit is the length of the segment.

3. Division of a Process into Segments public class Misc { public static int add(int a, int b) {return a+b; } public static int fact(int x) {int f= 1; if (x == 0) f = 1; else f = x* fact(x-1); return f; } public static double smaller(double d1, double d2, double d3, double d4) { double sm = d1; if(d2 < sm) sm = d2; if(d3 < sm) sm = d3; if(d4 < sm) sm = d4; return sm; } public static char smallest (char c1, char c2) {char s =c1; if (c2 < s) s = c2; return s; } } Advantage: The division of the process is according to the logical structure of the process

4. Process P Seg.# Logical address 0 a=(1, 786) 1 786 Segment Number s 2 3 Segment Number & Offset / Displacement Displacement d

5. RAM 0 OS 2048 A0 ProcessA 2648 s B0 3048 Limit Base 0 A0 A1 1 A1 0 600 2048 4048 1 1000 3048 B1 2 A2 6048 2 3022 6048 A2 Seg. Table for Process A 9070 Process B 0 B0 Limit Base 1 B1 400 2648 2000 4048 Seg. Table for Process B Loading Segments into the RAM

6. Limit Base 1000 1400 400 6300 400 4300 1100 3200 1000 4700 Relocation / Address Mapping Converting the logical address into the real address in the RAM is called Relocation / Address translation / Address Mapping and is done is done as follows: • Segment number is used to index the segment table; look into slot no. s of the segment table for the given process. This gives limit and base. • The displacement d is then compared with the limit. • If d > limit then this is addressing error; trap it. • If d < limit then real address: r = Base +d EX. Using the given segment table convert the logical address (3 , 657) into real address.

7. S d CPU RAM . . S . . Limit Base . . . . r r < yes + Base + d No Trap; addressing error Relocation / Address Mapping Address Translation in Segmentation

8. The respective advantages of paging and segmentation are combined into a paged segmented system. In this system: Main memory is divided into blocks of equal sizes called page frames. The process is divided into segments. The segments are divided into pages. A logical address a is now three dimensional: a = ( s, p, d), where: s is segment number p is page number within segment s d is offset within page p p s 0 0 1 0 1 s p 1 2 (1,2,345) 345 3 d 0 2 1 2 Combined Paging & Segmentation

9. Assignment 3 Marks = 3, Last Date for submission:15-01-2010 Q. Demonstrate page loading and address mapping in a paged segmented system.