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ECE 4110– Sequential Logic Design

ECE 4110– Sequential Logic Design. Lecture #2 Agenda Logic Design Tools Announcements n/a. Logic Design Tools.

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ECE 4110– Sequential Logic Design

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  1. ECE 4110– Sequential Logic Design Lecture #2 • Agenda • Logic Design Tools • Announcements • n/a

  2. Logic Design Tools • MS Visio- a generic drawing program.- industry is converging on this program for documentation.- has built in shape libraries, including analog/digital logic.- we’ll use it for this class to create clean schematics.

  3. Logic Design Tools • MS Visio Predefined Shapes

  4. Logic Design Tools • ModelSim (by Mentor Graphics)- an HDL Simulation (VHDL and Verilog)- widely used in industry- has color-coded text editing for keywords- has console for verification reporting- we’ll use for homework & before FPGA synthesis.

  5. Logic Design Tools • ModelSim Simulation Waveform ProjectNavigator Console

  6. Logic Design Tools • ModelSim Text Editor

  7. Logic Design Tools • Xilinx ISE - Integrated Software Environment (ISE)- Implementation tool - compile / simulate- synthesis- technology mapping- place and route- back annotation for post-route simulation and timing verification- can do similar simulation as in ModelSim- this is where we : - select FPGA to target - assign signal pins - set timing constraints - set placement constraints - set routing constraints - generate programming file - download file to FPGA, EEprom, or CPLD using the JTAG interface.

  8. Logic Design Tools • Xilinx ISE SourcesWindow Edit/ViewWindow ProcessesWindow

  9. Logic Design Tools • Xilinx ISE ResourceUsage PackageView Pin Assignments

  10. Logic Design Tools • Xilinx ISE RoutingEditor HDL or Schematic Entry

  11. Altera Quartus II Development Tool

  12. Example of File Menu

  13. New Project Wizard

  14. Creation of new project

  15. Adding files to project

  16. Choose device family and specific device

  17. Electronic Design Automation Tools

  18. Summary of project settings

  19. Quartus II display of created project

  20. Processing>Start Compilation

  21. Assignment > Pins For example, SW0,SW1 are connected on FPGA Pins N25,N26. LEDG0 is pin AE22.

  22. Available pins

  23. Programming the FPGA:Tools>Programmer • Check the Program/Configure box, then click Start. • Wait till the progress bar show 100% (done).

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