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Search for Universal Ternary Quantum Gate Sets with Exact Minimum Costs

Normen Giesecke, Dong Hwa Kim*, Sazzad Hossain and Marek Perkowski Department of Electrical Engineering, Portland State University, FAB 160-05, 1900 SW Fourth Avenue, Portland, Oregon, USA, E-mail: mperkows@ee.pdx.edu * Dept. of Instrumentation and Control Engn., Hanbat National University,

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Search for Universal Ternary Quantum Gate Sets with Exact Minimum Costs

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  1. Normen Giesecke, Dong Hwa Kim*, Sazzad Hossain and Marek Perkowski Department of Electrical Engineering, Portland State University, FAB 160-05, 1900 SW Fourth Avenue, Portland, Oregon, USA, E-mail: mperkows@ee.pdx.edu * Dept. of Instrumentation and Control Engn., Hanbat National University, 16-1 San Duckmyong-Dong Yuseong-Gu, Daejon, Korea, 305-719.E-mail: kimdh@hanbat.ac.kr Search for Universal Ternary Quantum Gate Sets with Exact Minimum Costs

  2. Hierarchical Decomposition and Synthesis of Ternary gates Mozammel Khan, ISMVL 2007 Synthesis using Logic Blocks and Gates Design of Logic Blocks and Gates This paper Ternary Quantum Multiplexers Ternary Muthukrishnan-Stroud Gates Soonchil Lee et al, MVL J 2006 Single-Qubit Rotation gates and 2-qubit Interaction gates

  3. Circuit Structures for Ternary Logic extend the structures for binary logic Binary Multi-Cube gate Multivalued counterpart of the Multi-Cube gate for any radix. FG is Feynman-Galois gate. Symbol  stands for exor. Kmap of function f(a,b,c,d) realized by the gate F = f(a,b,c,d) from above.

  4. Toffoli-like 3-controlled gate structure for Galois Field Sum of Product Circuits

  5. A cascade of two 2-controlled Toffoli-like gates for Modulo sum of minima type of circuits

  6. Ternary Wave Cascade (Modsum of ternary Maitra cascades) Because these structures are used again and again, it is definitely worthy to optimize their components very well, even spending months of computer time.

  7. Quantum Reversible Cascades with Ternary Quantum Multiplexers Op. 4 A A’ Op. 5 Operations for a ternary system Op. 6 +0 Wire +1 Modulo Shift +1 0 1 2 Op. 1 Op. 7 +2 Modulo Shift +2 B B’ 01 Swap 0 1 Op. 2 Op. 8 02 Swap 0 2 12 Swap 1 2 Op. 3 Op. 9 Time • Reversible cascades are used to represent logic gates. The gates themselves are realizable via quantum technologies. • Reversible cascades are not schematics; instead of being physical representations, they are chronological. • Time flows from left to right • Gates are not physical gates; instead, they are electromagnetic pulses applied to some group of quantum particles that change their bit representation • This means that there cannot be a “feedback”; Gates cannot be controlled by previous states that have changed.

  8. A A’=A wire B B’ wire operation The Muthukrishnan-Stroud Gate Operations for a ternary system +0 Wire +1 Modulo Shift +1 +2 Modulo Shift +2 01 Swap 0 1 02 Swap 0 2 12 Swap 1 2 A P 2 operation B Q Two views of MS gate • Multi-valued representation is based on the Muthukrishnan-Stroud gate • It acts essentially as a multi-valued multiplexer • There is one control line, one input line, and one output line • When the control line qubit is at its highest order value (i.e., |2> in a ternary system of |0>, |1>, |2>), it selects an operation to apply to the input line • If the control line is at any other value, not the highest order value, the multiplexer acts as a quantum wire and passes the input directly to output

  9. A A’=A Operation 1 B B’ Operation 2 Operation 3 Time Quantum Reversible Cascades cont. Operations for a ternary system +0 Wire +1 Modulo Shift +1 +2 Modulo Shift +2 01 Swap 0 1 02 Swap 0 2 12 Swap 1 2 • Based on the Muthukrishnan-Stroud gate, we use a generalized multi-valued gate which we can implement via macros of the Muthukrishnan-Stroud gate • It is similar to the Muthukrishnan-Stroud gate, except it can select different operations for different control line values, rather than a multiplexer that only operates when the control line is the highest value • Ultimately we expect to see direct implementation of the generalized ternary gate (GTG) • The operations used are multi-valued operators. The operators for a ternary system are listed

  10. Muthukrishnan-Stroud Gate • Internally, built from Interaction gates and rotations

  11. What are the internals of the MS Gate? Sequence of X, Y and Z rotations Schematic view of Muthukrishnan-Stroud Gate as a controlled sequance of rotations in X, Y and Z axes by arbitrary angles X rotation Y rotation Z rotation

  12. Use of interaction gate X rotation Y rotation Z rotation General case rotations rotations Z Z rotations Special cases are cheaper X rotation Y rotation Z Z

  13. General view of cascade for D-level circuits rotations rotations rotations rotations rotations Z Z rotations Every multi-valued quantum multiplexer can be build like this

  14. A P f3 f0 B Q f1 f4 f2 f5 f3 A P f4 f5 f0 f6 B Q f1 f7 f8 f2 First two structures based on cascaded quantum multiplexers

  15. A fd PA fe B ff fa PB fb Z PZ fc PR fa11 fm fq fj fg |0> fb fn fr fk fh fc fp fs fl fi One more structure based on cascaded quantum multiplexers

  16. Problem Formulation/Motivation • The system in ternary logic • A ternary output is specified • Goals: • Find a (quasi)-minimum circuit in a form of a cascade, given input/output specification. • Introduction of minimal number of ancilla bits (garbage/constant input) • Gates: • Only Generalized Ternary Gates (GTG) in series are used for synthesis

  17. Exhaustive Search: Why? • No experience and knowledge about the space to search. Nothing was published when this work started • To get a feeling what GTG are capable for • Straight forward process • A breadth-first search seemed a good start

  18. 1 2 3 4 5 6 7 8 9 10 11 Breadth first search (BFS) • BFS is a tree search algorithm used for searching a tree, tree structure, or graph. • The breadth-first-search begins at the root node and explores all the neighboring nodes. Then for each of those nearest nodes, it explores their unexplored neighbor nodes, and so on, until it finds the goal. • There are 216 different GTG realizations (63 operation combinations)

  19. A A’ +0 +0 12 |0> R +0 +0 12 A A +1 +0 12 B B 1. GTG Gate 2. GTG Gate 216. GTG Gate +0 +0 +0 |0> R +0 +0 +0 +0 +0 +0 A A B B +0 +0 +0 |0> +0 +0 +0 R +0 +0 +1 A A B B 12 12 12 |0> R 12 12 12 12 12 12 Breadth first search (BFS) cont. • 216 different GTG realizations 1.GTG - 1.GTG - 1.GTG 1.GTG - 1.GTG - 2.GTG … 216.GTG - 216.GTG - 216.GTG

  20. A B B A Exhaustive Search: Example • This example gives the implementation of a 2-qudit ternary SWAP Gate • The example begins on the first multiplexer and ensue the first truth table. Continuing that way, the last of the truth tables shows the results of the multiplication of the truth tables of the current multiplexer with the one before • The third truth table shows the solution of the 2-qudit ternary SWAP

  21. +1 +2 A B +2 02 +1 12 B A 01 A 0 0 0 1 1 1 2 2 2 A 0 0 0 1 1 1 2 2 2 A 0 0 0 1 1 1 2 2 2 A B 0 1 2 0 1 2 0 1 2 A B 0 1 2 0 1 2 0 1 2 A B 0 1 2 0 1 2 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 1 0 0 0 2 0 0 0 0 0 0 0 1 0 0 2 0 1 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 0 1 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 2 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 1 2 0 0 0 0 0 0 0 1 0 1 2 0 0 0 0 0 0 1 0 0 2 1 0 0 0 0 0 1 0 0 0 1 2 0 0 0 1 0 0 0 0 0 2 0 1 0 0 0 0 0 0 0 0 2 2 0 0 0 0 0 0 0 0 1 2 0 0 0 0 0 0 0 1 0 0 2 1 0 0 0 0 1 0 0 0 0 2 1 0 0 0 0 0 0 0 1 0 2 2 0 0 0 0 0 0 0 0 1 2 2 0 0 0 0 0 0 0 0 1 Exhaustive Search: Example cont. • 2-qudit SWAP gate

  22. Ternary Quantum Logic: Exhaustive Search

  23. Iterative deepening search

  24. Iterative deepening search l =0

  25. Iterative deepening search l =1

  26. Iterative deepening search l =2

  27. Iterative deepening search l =3

  28. Iterative deepening search • Number of nodes generated in a depth-limited search to depth d with branching factor b: NDLS = b0 + b1 + b2 + … + bd-2 + bd-1 + bd • Number of nodes generated in an iterative deepening search to depth d with branching factor b: NIDS = (d+1)b0 + d b^1 + (d-1)b^2 + … + 3bd-2 +2bd-1 + 1bd • For b = 10, d = 5, • NDLS = 1 + 10 + 100 + 1,000 + 10,000 + 100,000 = 111,111 • NIDS = 6 + 50 + 400 + 3,000 + 20,000 + 100,000 = 123,456 • Overhead = (123,456 - 111,111)/111,111 = 11%

  29. Properties of iterative deepening search • Complete? Yes • Time?(d+1)b0 + d b1 + (d-1)b2 + … + bd = O(bd) • Space?O(bd) • Optimal? Yes, if step cost = 1

  30. Summary of algorithms

  31. Multiplexer Implementation • Multiplexer implementation for two variables is in fact straightforward • Here we also introduce the idea of mirroring • After a constant input line performed its operation, it can be reused. • But for before it needs to be reset • Mirroring serves this purpose well, at the cost of some additional gates. • By introducing N additional gates, where N is the number of gates required for implementation, an inverse set of gates can be implemented to realize the original set of inputs on the output • Notice that each and every operation (both swap and shift operations) have a “conservative” map or inverse operation

  32. Operations for a ternary system Conservative or Inverse Operations +0 Wire +0 Wire Mirroring gates +1 Modulo Shift +1 +2 Modulo Shift +2 +2 Modulo Shift +2 +1 Modulo Shift +1 R=A A 01 Swap 0 1 01 Swap 0 1 B S=B 02 Swap 0 2 02 Swap 0 2 12 Swap 1 2 12 Swap 1 2 |0> |0> +1 +2 +1 +2 Z C Q where Z{+1,+2,01,02,12} Inverse Gates • Realization of the ternary Toffoli Gate as an example for mirroring:

  33. Limitations on the Goal Function • Because the operation of a GTG gives outputs that are always conservative, the goal function must be conservative with respect to the input variable • Functions that are NOT balanced cannot be directly implemented; they can, however, be implemented if we introduce an ancilla bit • An ancilla bit is simply an input line that is a known constant e.g. “|0>” • Also referred to as “garbage input.” Unless restored using the property of reversibility, it will result in a “garbage output” • Formula to calculate the number of balanced functions for a given radix and number of qudits (p=radix; n=number of qudits) Balanced function A\B 0 1 2 0 0 1 2 1 1 2 0 2 2 0 1 Unbalanced function A\B 0 1 2 0 0 0 0 1 0 1 2 2 0 2 1

  34. AB\C 0 1 2 A A 0 0 0 1 0 B B 0 1 0 1 2 0 2 0 1 1 1 0 0 1 0 1 1 0 1 2 1 2 0 1 1 C C 2 0 0 1 0 +2 01 +1 01 2 1 0 1 2 2 2 1 2 0 Implementation with more Input Variables • In the previous examples, the input was two variables. • Here we see an example of a 3-variable problem, the ternary Toffoli Gate • The Realization uses MS Gates and needs the minimum cost of 4 single qudit operations. • The Toffoli gate is a balanced gate and therefore no ancilla bit is needed. A B C Karnaugh map and realization of the ternary Toffoli gate:

  35. 2-qudit ternary MAX gate A A B B MAX A A B B +1 12 +1 |0> MAX (A,B) |0> +1 R +1 12 2-qudit ternary MIN gate A A B B MIN A A B B +1 02 01 |0> MIN (A,B) |0> R +2 12 +2 Results – The MIN and MAX Gate • The following two gates are the MIN and MAX gates • They can be used to build up a PLA like structure (using Mod-Sum) • Their drawback is the required ancilla qudit, but contemporary circuit CAD systems may be reused to start building quantum circuits out of MIN/MAX gates

  36. 2-qudit ternary Feynman gate (Controlled-NOT) A R A R B B +1 Results – The Feynman Gate • The Feynman Gate was found to be universal to construct complete quantum circuits. • There is a second version, which is called ternary Feynman Galois gate • Their realizations using GTG are shown below on the right-hand side 2-qudit ternary Feynman (Galois) gate A R=A A R B S= B +1 +2

  37. A B B A Results – 2-qudit SWAP Gate • The SWAP gate exchanges a pair of inputs to the output. • It has no counterpart in the classical binary logic because the crossing of electrical wires, for instance within 2 layers of metallization, is applied wherever it is needed and no special gate is required for this action. • There are no real wires and thus a “copying” or “cloning” gate is required to perform this 2-qudit ternary SWAP gate; Symbol (a), Input/Output table (b), Realization (c) A B A’ B’ +1 0 0 0 0 A A’ +2 0 1 1 0 0 2 2 0 1 0 0 1 +2 02 1 1 1 1 1 2 2 B B’ 1 +1 12 2 0 0 2 01 2 1 1 2 2 2 2 2 (a) (b) (c)

  38. 0 0 1 0 A B 2 0 0 1 B A 1 1 2 1 0 2 1 2 2 2 Results – 2-qudit Inverse SWAP Gate • Similar to the SWAP gate is the Inverse SWAP gate that we proposed • The pairs of inputs and outputs are also exchanged but in addition the order of the output is flipped around. • It is expected that it is universal as the 2-qudit SWAP gate. NEW 2-qudit ternary Inverse SWAP gate; Symbol (a), Input/Output table (b), Realization (c) A B A’ B’ A’ B’ +2 0 0 2 2 A‘ A +1 0 1 1 2 0 2 0 2 1 0 2 1 01 Flipping Swapping 1 1 1 1 1 2 0 1 B‘ B +1 12 2 0 2 0 +2 02 2 1 1 0 2 2 0 0 (a) (b) (c)

  39. A A‘ B B‘ A R C C‘ B S +1 01 01 +2 C Results – Ternary Toffoli Gate • Toffoli is viewed as universal, and thus another important gate. • Its realization using GTG is possible without an ancilla qudit. • From the Toffoli gate, which is a 2 - Controlled-Not, it is possible to build up an n-qudit – Controlled-Not. • The realization requires only 4 segments and 4 single quditoperations. It seems to be the best realization found so far, compared to the literature • No mirroring is needed. 3-qudit ternary Toffoli gate (2-Controlled-NOT); Symbol (a), Realization (b) (a) (b)

  40. Some New Gates Invented by Exhaustive Search • Using the exhaustive program I found the following: 1. all 2-qudit gates can be realized within 4 segments (4 quantum multiplexers). 2. 1680 out of the 19683 2-qudit gates need no additional ancilla qudit to be realized, the rest do 3. the number of single qudit operations at the multiplexers is not higher than 6 for all of the 2-qudit gates 4. The exhaustive algorithm produced a library where the realization of all 2-qudit gates, their structure and single qudit operations are stored.This data can be used for a CAD system for quantum logic circuits.

  41. Gates used in GA • Not all 216 Generalized Ternary Gates (GTG) were used • Yen et al. showed that 12 Generalized Ternary Gates (GTG) out of the 216 GTG are universal and sufficient to realize quantum gates • The Genetic algorithm used only those 12 GTG, and the single qudit operations (+1,+2,01,02,12)

  42. R 02 02 A +2 S +2 B +1 +2 A R B What was invented – 2-qudit Feynman • The solutions found by the GA have higher cost 2-qudit ternary Feynman gate (Controlled-NOT) A R R A B S B +2 +2 2-qudit ternary Feynman (Galois) gate

  43. A B B A Results – 2-qudits SWAP • The nature of the GA can be seen again. The solution that were found are not optimal • The found result can be minimized. 2-qudit ternary SWAP gate; Symbol (a) and Realization found by the GA (b) (a) (b) +1 +1 +1 +2 A B 12 +1 +2 +1 +1 +1 B A +1 +1 +1 +1 +1 +1

  44. A B B A Results – 2-qudits Inverse SWAP • The GA found a realization for the new proposed Inverse SWAP gate 2-qudit ternary Inverse SWAP gate; Symbol (a) and GA realization (b) (a) (b) +1 +2 +2 A B +2 +1 +1 +1 +1 +2 +2 +2 +2 +1 +2 +2 B A +2 +2 +1 +2 +2 02 +2 +2 +2 +2 +1 +1 +1 AE AC L Q G N P I ^ V W N T R P ] I P T Genotype: p^ppAEppVppWppACppNppTppRppPpp]ppIppPppGppNppIppLppQppPppTp

  45. A B B C C A Results cont. • The 3-qudit SWAP gate was not possible to find with the exhaustive search and therefore indicates the ability of the GA • The 3-qudit SWAP exchanges the 3 input to the output • There are Ns Number of SWAP gates for Nq qudits 3-qudit ternary SWAP gate; Realization (a) and Symbol (b) (a) (b) +1 B A +2 +1 02 +1 +1 C B 12 +1 +1 +1 +2 +1 01 02 +1 +1 C A 12 +1 01

  46. Improvements on the GA • The GA is restricted to an small number of the 216 different GTGs • Therefore analyze the GTGs in the 2-qudit library and use those for the GA • Automation of the GA: • e.g. If diversity of the population goes down: • Change of the mutation ratio (erasure/addition/flipping) • or increase the mutation probability

  47. Conclusion

  48. Exhaustive Search Benefits • Toffoli Gate is realized in 4 GTGs • An algorithmic method was given to implement ternary quantum logic gates using the principles of MS gates and GTG • Exhaustive search for 2-variable goal functions results in maximum of 4 levels of multiplexer, and one ancilla bit. • Realizations of well known universal quantum gates for 2- and 3-qudit were found and verified. • Formula to calculate the number of balanced functions for a given radix and number of qudits was presented. • Results for all 2-qudit quantum gates are now available. • The gates discovered in this thesis can be used as building block in higher-level synthesis methods, as presented in the literature. Drawbacks • Limitations with respect to number of levels and qudits are given.

  49. Genetic Algorithm Benefits • A realization for a 3-qudit SWAP gate was found • A second algorithmic method was given to implement ternary quantum logic gates using the principles of MS gates and 12 GTGs • It supports the search for quantum gates where the exhaustive search is not applicable anymore • Serves as a foundation for future research Drawbacks • There is no guarantee to find a solution • If a solution was found it may not need to be minimal with respect to the number of levels and single qudit operations

  50. In Conclusion • Presented today were two software programs for logic synthesis for quantum realizable gates: • Exhaustive Search • Genetic Algorithm • We believe now that the best method is combining Iterative Deepening Depth First with A* Algorithm and recognizing “easy functions” on lower levels of the tree.

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