1 / 60

Lecture 02 : Digital Logic Circuits(1)

Lecture 02 : Digital Logic Circuits(1). Lecture 2 Digital Logic Circuits. Lecture 2: Digital Logic Circuits. In this lecture, we will study Digital Logic Circuit Specification of Logic circuits Boolean Function, Truth Table, Logic diagram, etc Gate symbols and truth tables Complete Set

race
Download Presentation

Lecture 02 : Digital Logic Circuits(1)

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Lecture 02 :Digital Logic Circuits(1) Lecture 2 Digital Logic Circuits CS311 Computer Organization

  2. Lecture 2:Digital Logic Circuits In this lecture, we will study • Digital Logic Circuit • Specification of Logic circuits • Boolean Function, Truth Table, Logic diagram, etc • Gate symbols and truth tables • Complete Set • Wired Logic(Virtual Logic, Dot Logic) • Sequential Logic elements • Flip Flops and Latches • Sequential Logic Circuits • Clock Cycle time • CPU as a sequential logic circuit CS311 Computer Organization

  3. Digital Logic Circuits In this lecture, we will study(cont.) • Computer logic functional blocks • Half Adder • Full Adder • Decoder • Multiplexer • Demultiplexer • Register • Shift Register • Counter • Integrated Circuits • General purpose LSI • ROM - ROM, PROM, EPROM • PLA • Microprocessor CS311 Computer Organization

  4. Volt 5 3 1 0 Value 1 undefined Value 0 Digital Logic Circuits Circuits • Analog Circuits and Digital Circuits Digital Logic Circuits • Processing information represented by digital signal(discrete values) • e.g. Binary - information is represented by only 1 and 0 • Two kinds of digital logic circuits • Combinational logic circuits • Sequential logic circuits CS311 Computer Organization

  5. Gate (f) Two Kinds of Logic Circuits:Combinational Logic Circuits Combinational Lgic Circuits are Memoryless • Output value is decided only by the input values • Gates(AND, OR, Inverter, NAND, NOR, XOR, so on) 0 1 0 1 I f(I) CS311 Computer Organization

  6. F/F(f) storing S I f(I, S) Two Kinds of Logic Circuits:Sequential Logic Circuits Sequential Logic Circuits are capable of memorizing information • Output value is decided by the state of the circuit(memorizing information) and the input value • Flip Flop(F/F), Latch CS311 Computer Organization

  7. A B C X 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 0 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 1 A B C X Specifications of Logic Circuits • Boolean Function X = A + B’C • Truth Table • Logic Diagram CS311 Computer Organization

  8. Axiom in Boolean Algebra x + 0 = x x + x = x x . 0 = 0 x . x = x x + 1 = 1 x + x’ = 1 x . 1 = x x . x’ = 0 x + y = y + x x . y = y . x x + (y + z) = (x + y) + z x . (y . z) = (x . y) . z x . (y + z) = x . y + x . z x + y . z = (x + y) . (x + z) (x + y)’ = x’ . y’ (x . y)’ = x’ + y’ (x’)’ = x CS311 Computer Organization

  9. A B X A X A B X A B X A B X A X Basic Gates AND gate OR gate Inverter(I) 0 1 0 0 0 0 0 0 1 0 0 1 0 0 1 1 1 0 0 1 0 1 1 1 1 1 1 1 Controlling the signal path: A: information input B: control signal input A appears at the output X only when B is 1, otherwise X is 0 Merging information: A: information input B: information input Merged information of A and B appears at the output X Complement of information: A: information Complement of A appears at the output X. It can also be used to represent negative numbers CS311 Computer Organization

  10. A B X 0 0 1 0 1 1 1 0 1 1 1 0 Inverter A B X A B X 0 0 1 0 1 0 1 0 0 1 1 0 A B X A X 0 0 1 1 A X 0 1 1 0 A X A X Combinational Logic Components:Gate Symbols and Truth Table Buffer A Buffer is basically an amplifier, which strengthens the signal, it may also has a capability of filtering noise. NAND gate NOR gate CS311 Computer Organization

  11. A B X 0 0 0 0 1 1 1 0 1 1 1 0 A B X Combinational Logic Ccomponents:Gate Symbols and Truth Table Exclusive OR CS311 Computer Organization

  12. Combinational Logic Components:Complete Set Complete Set (of gates) • Set of different types of gates • Any logic function can be constructed using only the types of gates which are the members of a complete set • {I, AND}, {I, OR}, {NAND}, {NOR}, {AND, XOR}, {OR, XOR}, ... • What is the relationship between Complete Set and Device Technology? • Integrated Circuits; TTL, ECL • TTL NAND gate • ECL NOR gate Implications of Complete Set - Low hardware cost - Low maintenance cost CS311 Computer Organization

  13. Combinational Logic Components:Wired Logic Wired Logic, Dot Logic, Virtual Logic • Allows to make a certain logic function without using active components • Wired logic can be implemented simply by connecting the outputs of a certain class of gates • TTL OC(open collector) • ECL • Tristate buffer • Make the signal clean and strong • Space savings on PCB What is the significance of Wired Logic ? To drive a Bus line with information, it need to be amplified, made clean and strong CS311 Computer Organization

  14. +Volt R A S1 B S2 NAND WL X = (A . S1)’ . (B . S2)’ NAND A S1 B S2 AND OR X = (((A . S1)’)’ + ((B . S2)’)’)’ AND A S1 B S2 AND OR I X = ((A . S1) + (B . S2))’ AND Wired Logic - TTL OC:Wired AND CS311 Computer Organization

  15. S A S X 0 0 HiZ 1 0 HiZ 0 1 0 1 1 1 A S X 1 1 HiZ 1 0 HiZ 1 0 0 0 0 1 A X A X REG 0 REG 1 . . . . . . S0 S0 S1 S1 R0 . . . R0 R1 . . . R1 BUS Wired Logic:Tristate Buffer CS311 Computer Organization

  16. Time Out • 술집에 나란히 앉아 기분 좋게 술을 마시며 하루 저녁을 같이 지낸 두 사람이 10년 후 같은 장소에서 같은 시간에 만나기로 약속하고 헤어졌다. • 10년 후 그 중 한 사람이 그 술집에 돌아와 살펴보니 10년 전 술을 같이 마셨던 사람이 의자에 앉아 있었다. • 그래서 반가워서 손을 잡고 말했다. “그날 우리가 이곳을 떠날 때 나는 자네가 정말로 여기서 다시 만나게 되리라고는 생각하지 않았네.” • 그러자 앉아 있던 사람이 그를 물끄러미 쳐다보더니 고개를 갸우뚱하며 말했다. “누가 떠났단 말인가?” CS311 Computer Organization

  17. Combinational Logic Circuits • Half Adder • Full Adder • ALU • Decoder • Multiplexer • Demultiplexer • Parity Generator • Parity Checker • Code Converter CS311 Computer Organization

  18. 1-state 0-state Q’=0 Q=1 Q’=1 Q=0 Sequential Logic Components Logic circuits which are capable of storing digital information Flip Flop • 1 bit storage • a device which can only be in either one of the 2 stable states State of a Flip Flop Stable State Output of the circuit does not change once the circuit is made to produce that output CS311 Computer Organization

  19. S Q R Q’ S R I Q’ OR OR I Q S R Q Comment Sequential Logic Components:SR-Latch Characteristic Table • Asynchronous operation • It responds to the input change • It is very dangerous operation when there are large number of flip flops or latches • => Synchronous operation 0 0 Q0 no change 0 1 0 reset 1 0 1 set 1 1 - prohibited CS311 Computer Organization

  20. f1 t1 f3 F/F f2 t2 Asynchronous Sequential Logic Circuit CS311 Computer Organization

  21. S R AND I Q’ OR S Q R Q’ Clock C OR I Q AND S R C Q Q’ comment Sequential Logic Components:Synchronous SR-Latch Characteristic Table d d 0 Q0 Q0’ no change 0 0 1 Q0 Q0’ no change 0 1 1 0 1 reset 1 0 1 1 0 set 1 1 1 - - prohibited CS311 Computer Organization

  22. D E S Q Q R Q’ Q’ D Q E Q’ C D E Q Q’ Sequential Logic Components:D-Latch Identical to the synchronous SR-Latch. Except that S=R=1 condition is prohibited by the external circuit Characteristic Table d 0 Q0 Q0’ 0 1 0 1 1 1 1 0 CS311 Computer Organization

  23. S2 Q2 Q R2 Q2’ Q’ D C S1 Q1 R1 Q1’ D Q C Q’ C1 C2 0 1 D C Q Q’ Sequential Logic Components:D-Flip Flop It saves the input information on D line prior to the transition to the active levelof the clock pulse Can be synthesized with 2 synchronous SR-latches Characteristic Table d 0 Q0 Q0’ 0 0->1 0 1 1 0->1 1 0 CS311 Computer Organization

  24. S2 Q2 Q R2 Q2’ Q’ J Q C K Q’ S1 Q1 R1 Q1’ AND J K C C1 C2 AND J K C Q Q’ Sequential Logic Components:JK-Flip Flop JK-flip flop makes the input values S=R=1 of the SR-latch valid by using 2 SR-latches Characteristic Table 0 0 d Q0 Q0’ d d 0 Q0 Q0’ 0 1 0->1 0 1 1 0 0->1 1 0 1 1 0->1 Q0’ Q0 CS311 Computer Organization

  25. Data clock Latch and Flip Flop • Latch • Responds to the data input during the active level of clock • Flip Flop • Responds to the data input during the active transition of the clock latch F/F When the delay of the data path is unpredictable, exact time when the valid data arrives to the input of F/F or Latch is unpredictable. In this case, F/F is difficult to use - exact moment when to make clock transition. CS311 Computer Organization

  26. F/F(tf) . . . Combinational Logic Circuit(tc) F/F(tf) Sequential Logic Circuit Sequential Logic Circuit - Logic circuit with combinational logic circuits and F/F or Latch • For safe operation, a clock is needed • What is the clock cycle ? Clock Cycle = 1 / (tf + tc) = 1 /( (ts + th + td) + tc) F/F(tf): Setup time(ts): stable data period before active transition of clock Hold time(th): time for maintaining stable data signal Delay(td): time to cause the output change CS311 Computer Organization

  27. Time Out • An Irishman had been drinking at a pub all night. The bartender finally said that the pub was closing. So, the Irishman stood up to leave fell flat on his face. He tried to stand one more time; same result. He figured he’ll crawl outside and get some fresh air and maybe that will sober him up. • Once outside, he stood up and fell on his face again. So he decided to crawl the four blocks home. He crawled through the door and into his bedroom. Again, he fell flat on his face. • When he reached his bed he tried one more time to stand up. This time he managed to pull himself upright, but quickly fell right into the bed and is sound asleep as soon as his head hit the pillow. • He was awakened the next morning to his wife standing over him, shouting, “So you’ve been drinking again!” • Putting on an innocent look, and intent on bluffing it out he said, “What makes you say that?” • “The pub just called; you left your wheelchair there again.” CS311 Computer Organization

  28. CS311 Computer Organization

  29. CS311 Computer Organization

  30. CS311 Computer Organization

  31. CS311 Computer Organization

  32. CS311 Computer Organization

  33. CS311 Computer Organization

  34. CS311 Computer Organization

  35. CS311 Computer Organization

  36. Very Simple Model of CPU Equivalent Sequential Circuit Input Bus 1 Input Bus 2 Sequential Logic Circuit Combinational Logic Circuit Registers (Sequential) ALU (Combinational) Output Bus 1 ㅁ ( (ts + th + td)REG + tALU ) + tbus Minimum CPU Clock Cycle CPU:A Sequential Logic Circuit CS311 Computer Organization

  37. Functional Blocks for Computers Half Adder Full Adder Decoder Multiplexer Demultiplexer Register Shift Register Counter CS311 Computer Organization

  38. S = A’ . B + A . B’ = A + B C = A . B Ai Bi Si Ci DI1 S HA DI2 C A B S C 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 Computer Logic Circuits:Half Adder CS311 Computer Organization

  39. DI1HA S DI2 C Si Ci Ci-1 Ai Bi DI1HA S DI2 C A B Ci-1 S Ci 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Computer Logic Circuits:Full Adder CS311 Computer Organization

  40. N to 2N(N- 2N) Decoder A B X0 X1 X2 X3 A B X0 X1 X2 X3 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 1 I0 I1 I2 In-1 X0 X1 X2 X2n n-2n decoder . . . . . . Computer Logic Circuits:Decoder CS311 Computer Organization

  41. I0 I1 I2 I3 I2 X I0 I1 I2 In-1 X N x 1 MUX . . . E a0 a1 a0 a1 am m = log2 n Computer Logic Circuits:Multiplexer 1 0 1 CS311 Computer Organization

  42. X0 X1 X2 X3 X0 X1 X2 Xn-1 0 0 D 0 . . . D (1 x n) DMUX a0 a1 . . . am a0 a1 Computer Logic Circuits:Demultiplexer D 1 0 CS311 Computer Organization

  43. IL J Q C JKF0 K Q’ J Q C JKF0 K Q’ J Q C JKF0 K Q’ J Q C JKF0 K Q’ OR C Computer Logic Circuits:Shift Register CS311 Computer Organization

  44. X0 X1 X2 X3 Parallel Outputs J Q C JKF0 K Q’ J Q C JKF1 K Q’ J Q C JKF2 K Q’ J Q C JKF3 K Q’ C OL OR IL IR Serial/Parallel Input Shift Register PL PL LS RS LS RS I0 I1 I2 I3 Parallel Inputs CS311 Computer Organization

  45. X2 X4 X8 X16 +V J Q0 C JKF0 K Q0’ J Q0 C JKF1 K Q0’ J Q0 C JKF2 K Q0’ J Q0 C JKF3 K Q0’ C Modulo-16 Binary Counter Computer Logic Circuits:Counter X2 = Q0 X4 = X2 . Q1 = Q0 . Q1 X8 = X4 . Q2 = Q0 . Q1 . Q2 X16 = X8 . Q3 = Q0 . Q1 . Q2 . Q3 CS311 Computer Organization

  46. 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Modulo-16 Counter C Q0 Q1 Q2 Q3 C X2= Q0 X4= Q0 .Q1 X8 = Q0 .Q1 .Q2 X16= Q0 .Q .Q2 .Q3 C/2 C/4 C/8 C/16 CS311 Computer Organization

  47. Technology Hybrid Monolithic thick thin bipolar unipolar film film TTL ECL IIL MOS IC - Integrated Circuit • Characteristics • Smaller size • faster speed • smaller power consumption • longer life, higher reliability • simplify the external connections • economic • Degree of integration (P,N,C,H) • SSI, MSI, LSI, VLSI, WSI/SOC • Package type • DIP, QUIP, PGA, ... • Monolithic and Hybrid ICs CS311 Computer Organization

  48. Pin PCB Types of IC QUIP(Quad In-Line Package) DIP(Dual In-Line Package) PGA(Pin Grid Array) SMT(Surface Mount Technology) CS311 Computer Organization

  49. General Purpose LSI Logic Elements Logic components for all purpose • Read Only Memory(ROM) • PLA(Programmable Logic Array) • Microprocessors • Why general purpose logic elements ? • Cost advantage by mass production • Cost advantage in maintenance • Types of spare parts to keep • Trouble shooting CS311 Computer Organization

  50. General Purpose LSI Logic Elements:ROM - Read Only Memory • Characteristics • Contents cannot be changed, but provides very fast Reads • Writing • Needs to make a mask • To make a mask logic function must be represented in the form of sum of canonical products • Canonical Products: • For an n-variable Boolean function, a product term is represented by using n variables; • e.g. 3-variable(A, B, C) Boolean function • B => ABC + A’BC + ABC’ + A’BC’ • AB => ABC + ABC’ CS311 Computer Organization

More Related