Lecture 26: Logic Design (Part 3)

Lecture 26: Logic Design (Part 3) PROF. INDRANIL SENGUPTA DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING

Special Decoder Designs Example: 4-to-16 decoder using two 2-to-4 decoders and a gate-switching matrix.

Example: BCD-to-Decimal Decoder BCD-to-Decimal Decoder f0 w f1 x f2 y f3 z f4 f5 f6 Enable f7 f8 f9

BCD to Seven-Segment Decoder • 7-segment displays are commonly used for numerical displays. • There are seven display segments, designed using LED, LCD, or any other technology. • Depending on the digit to be displayed, the appropriate segments should glow.

BCD Code 7-segment Code A = x1+ x2’x4’+ x2x4+ x3x4 B = x2’+ x3’x4’+ x3x4 C = x2+ x3’+ x4 D = x2’x4’+ x2’x3+ x3x4’+ x2x3’x4 E = x2’x4’+ x3x4’ F = x1+ x2x3’+ x2x4’+ x3’x4’ G = x1+ x2’x3+ x2x3’+ x3x4’

Encoders • An encoder typically has 2n input lines and n output lines. • Only one of the input lines is at 1 at a time; and the rest are all 0’s. • The outputs will contain the binary code of the input line that is at 1. D0 8-to-3 Encoder D1 D2 f0 D3 f1 D4 f2 D5 D6 D7

What happens for the other input combinations? • There is ambiguity. • We typically use a priority encoder, where the input lines have some priority.

Priority Encoder • Basic concept: • The input lines are assumed to represent units that request some service. • When two inputs Diand Dj (i > j) request service simultaneously, line Diis assumed to have higher priority than line Dj. • The outputs of the encoder gives the binary code indicating which of the input lines requesting service has the highest priority.

D0 8-to-3 Priority Encoder D1 D2 f0 D3 f1 D4 f2 D5 D6 D7

The switching expressions for the outputs: f2 = D4D5’D6’D7’ + D5D6’D7’ + D6D7’ + D7 = D4 + D5 + D6 + D7 f1 = D2D3’D4’D5’D6’D7’ + D3D4’D5’D6’D7’ + D6D7’ + D7 = D2D4’D5’ + D3D4’D5’ + D6 + D7 f0 = D1D2’D3’D4’D5’D6’D7’ + D3D4’D5’D6’D7’ + D5D6’D7’ + D7 = D1D2’D4’D6’ + D3D4’D6’ + D5D6’ + D7

Comparators • An n-bit comparator compares the magnitude of two numbers Aand B, and produces three outputs GT, EQ and LT: • GT = 1, if and only if A > B • EQ = 1, if and only if A = B • LT = 1, if and only if A < B

1-bit Comparator • If A and B are 1-bit numbers, then GT = A.B’ LT = A’.B EQ = A’.B’ + A.B = A xnor B

2-bit Comparator A1A2 B1B2 00 01 11 10 A1 A2 B1 B2 EQ GT GT GT 00 LT EQ GT GT 01 2-bit Comparator LT LT EQ LT 11 GT = A1A2B2’ + A2B1’B2’ + A1B1’ EQ = A1’A2’B1’B2’ + A1’A2B1’B2+ A1A2’B1B2’ + A1A2B1B2 LT = A2’B1B2+ A1’A2’B2+ A1’B1 LT LT GT EQ 10 EQ LT GT

4-bit Comparator • Suppose the two numbers: A = A3A2A1A0and B = B3B2B1B0 • Let xi = Ai’.Bi’ + Ai.Bi (xi = 1 if Ai and Bi are equal) • The switching expressions for comparison: EQ = x3.x2.x1.x0 GT = A3.B3’ + x3.A2.B2’ + x3.x2.A1.B1’ + x3.x2.x1.A0.B0’ LT = A3’.B3+ x3.A2’.B2+ x3.x2.A1’.B1+ x3.x2.x1.A0’.B0

END OF LECTURE 26

Lecture 26: Logic Design (Part 3)