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A Low-Jitter 8-to-10GHz Distributed DLL for Multiple-Phase Clock Generation

A Low-Jitter 8-to-10GHz Distributed DLL for Multiple-Phase Clock Generation. Keng-Jan Hsiao and Tai-Cheng Lee National Taiwan University Taipei, Taiwan. Outline. Motivation System Architecture System Model Circuit Details Experimental Results Conclusion. Introductions.

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8fs rms jitter 293 - PowerPoint PPT Presentation

A Low-Jitter 8-to-10GHz Distributed DLL for Multiple-Phase Clock Generation