1 / 11

Abstract

Abstract

shina
Download Presentation

Abstract

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Abstract This poster describes an integrated audio/video decoder for video recorders. The IC has a number of novel features designed to improve video decoder performance over what is now available in the market whilst also introducing measures to reduce the implementation cost and the power consumption. 1

  2. Introduction For legacy reasons and because of the increase in demand from markets that have later dates for analogue switch-off, (e.g. East Europe, India and South America), it is likely that analogue decoding will be a requirement well into the next decade. It was therefore decided, to have a fresh look at this function and see where cost savings could be made whilst also improving the decoder performance. Quality improvements include a ‘memory-less’ 3D comb architecture, a bandwidth improvement for video cassette recordings and an automatic YC delay compensation. 2

  3. Overview 3 AUDIO DECODER AUDIO FORMAT I2S I2S IN 1 Y/Pb/Pr VBI 1 R/G/B AFE (Mux, Clamp, Gain) 2 2D/3D ADAPTIVE COMB O-11 Y/C Output Proc SRC/ VFE ADC DEMOD BT656 4 CVBS 1 SIF 2 FAST BLANK/SWITCH E5.3 FSUMA SYNC/ TIMING Clock HPLL 24.576MHz JTAG I2C 12.288MHz Algorithm development platform

  4. Analog Front End 4 CVBS Tuner 0 CVBS Tuner CVBS SCART 2 1 CVBS SCART 2 CVBS OUT A CVBS Front CVBS Front 2 SCART 2 (AUX) CVBS MPEG Y 3 CVBS SCART 1 4 G 5 YC C 6 Front Panel CVBS Tuner 7 CVBS SCART 1 CVBS OUT B CVBS Front B 8 Tuner CVBS MPEG CVBS O/P from MPEG 9 10 Additional loop through analogue multiplexing SCART 1 (TV) R 11 RGB out from MPEG IC External MUX Single multiplexed ADC allows 4 channels of simultaneous video. 12 analogue inputs. Sync separator for ‘5 channel mode’ (e.g. Canal+). Low power/standby mode. Integrated SCART switching support.

  5. Analog Front End 5

  6. VCR Signal Improvement 6 Composite video Y-notch Luminance HPF Fsc Fsc Fsc Comb LPF Chrominance Fsc Improves VCR luminance bandwidth by recovering ‘lost’ HF luma. Establishes the correct HF remodulation phase to add back the HF luma using a measure of edge detail.

  7. Sampling strategy 7 Avoid ‘in-band’ beat frequencies. Audio decoder, SIF and video sampled at free-running 24.576MHz. Sample rate converter converts video to 27MHz. VCR mode ‘smoothes’ unstable inputs. I.C. Validation board

  8. Auto Y/C delay 8 Signal Preconditioning 596ns ACC ACC ACC ACC Signal Preconditioning 596ns 148ns 148ns 148ns 148ns Automatic Y/C delay compensation using edge correlation

  9. 3D Comb Filter 9 Video Decoder (Master) ‘Memory-less’ 3D comb using shared memory concept, (with MPEG codec). Simultaneous Frame/field/line/notch filters switched on pixel basis. Minimum delay mode, (no audio delay compensation).

  10. Low Power 10 Low power consumption is a given in today’s consumer equipment and in this respect decisions made in the design process, (e.g. for a single delta-sigma ADC and other strategies), mean the active power consumption of the final IC is not expected to exceed 450mW. In addition when the video recorder is put into standby mode the IC may be ‘powered down’ whereby all of the IC is run at a much reduced clock rate, thereby retaining all register values and the analogue loop-through function, whilst also being able to be ‘woken up’ as required. Standby power consumption is less than 10mW.

  11. Conclusions 11 Analogue video will remain a requirement on video recorders for the foreseeable future. This project shows that there are still further measures that may be implemented that can improve the resulting recorded image, whilst also saving on the cost and power requirements.

More Related