1 / 18

SEAKR Engineering Inc. On-Board Processing

SEAKR Engineering Inc. On-Board Processing. ReConfigurable Computing, SEAKR’s Core Business. RCC technology is a core technology for SEAKR engineering We are dedicated to developing state of the art RCC and other processing systems. Leverage large diverse customer base

sook
Download Presentation

SEAKR Engineering Inc. On-Board Processing

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. SEAKR Engineering Inc. On-Board Processing

  2. ReConfigurable Computing, SEAKR’s Core Business • RCC technology is a core technology for SEAKR engineering • We are dedicated to developing state of the art RCC and other processing systems. • Leverage large diverse customer base • Radiation testing of components • Prevent obsolescence • Fastest development times • Lowest cost systems • High level of integration • Reduced SWaP • Creates a sustainable system • Eliminate Stove pipes • Developing industry partners for using our RCC technology across subsystems. • Flexible platforms that enable reuse among subsystems. • Routers, COMSEC, Telecom, SDR, OBP Mass Data Storage Payload Data Processor COMSEC Routers Telecom Accelerators Software Defined Radio

  3. SEAKR Processing Concept • Objectives • Provide sustainable processing platforms for users. • SEAKR algorithms • Users algorithms • SEAKR platforms • Users platforms • Provide SEE mitigation technologies for users of SEAKR platforms. • IP cores • System design techniques • Radiation characterization of components • Provide technical customer support that specializes in the specific needs of the space community SEAKR, Customer, or Combination Board level Or Integrated System System Application Algorithms Platform (SEAKR, Customer) SEAKR Core Technology Radiation Testing SEE Mitigation Cores Software API Structural Design POL Converters Thermal Management Reliability Testing Hardware Architecture Integrated and cost effective solutions Provide a competitive advantage to users

  4. 4 Generations of RCC Platforms V1-RCC V2-RCC NT-RCC-R NT-RCC V4-RCC In Development In Development Four Generations of RCC Platforms V1, V2, V2P/-X, V4

  5. SEAKR RCC Development • Virtex-I RCC product • Four Xilinx XQVR1000 FPGA CO-Processors • 256 Mbytes of EDAC R-S Protected SDRAM for each COP • Configuration RAM SEU detection and correction • Non-Volatile memory for 32 different configurations • Symmetrical FPGA designs • Internal PCI bus with PMC slot • Cop Interconnect Bus • Read and write COP configurations via cPCI • cPCI 32/64 33 Mhz, 6U form factor • LVDS I/O (Discrete, Serializer/De-serializer) • SERDES capable of 8 Gbps Adopted by GSFC for their laser altimeter program

  6. Virtex I RCC Block Diagram

  7. Virtex II RCC Block Diagram

  8. V2-RCC • Four CoProcessors (COPS) • Xilinx XC2V6000 CO-Processors (24M Programmable gates) – 1144 CGA Package • 6 Gb SDRAM per COP (on board and mezzanine). • 25 GFLOPs • Radiation Tolerant System by Design (RTSD) • FPGA mitigation techniques • SEU and TID radiation techniques for memories • Radiation Tolerant power conversion • Non-Volatile memory for 32 different configurations • Data Buses • Internal PCI bus (~1Gbps) • Shared COP Interconnect Bus (~4.224 Gbps) • Pipelined COP bus (~10.0 Gbps) – LVDS • cPCI 32/64 33/66 Mhz • LVDS SERDES (24 Gbps aggregate bandwidth) • TX 12 Gbps. RX 12 Gbps • Mezzanine Card • 12 Gbps data rates • 4 Gb SDRAM card with aggregate bandwidth of 19.2 Gbps.

  9. Network Based RCC • SEAKR has performed a trade study on network based RCC processing architectures. • Our Network based design leverages much of our existing architecture and interface. • Builds on our existing V2 RCC architecture but changes some of the physical partitioning due to greater Actel AX device capability and adds an 6 to 8 port network switch • PCI interface and functionality remains intact. • Configuration scrubbing and SEE mitigation is identical • Uses existing interface GUI and drivers for configuration control and FPGA communication. • High Speed Serial I/O • Network protocol

  10. NT-RCC-R Block Diagram RIO A Parallel RIO QDR SRAM 1M x 36 QDR SRAM 1M x 36 COP A Xilinx V2Pro Serial RIO 4X3.125 Gbps COP SelectMap PCI NIC SelectMap DDRII PCI-PCI Bridge / Config 6 Port Switch Xilinx V2Pro (NIC) Flash Flash Flash DDR II SDRAM 512 Mbyte Power Switch Serial RIO 4X3.125 Gbps cPCI J1 J2 J3

  11. SEAKR NT-RCC-R • Network IF Chip (NIC) • Parallel Rapid IO Port • (4) 3.125Gbps serial links off board • (4) 3.125Gbps serial links to COP HSIO Parallel RIO Port • CO-Processor (COP) • 2VP70 • ~8Mbits embedded RAM • HSIO to NIC • 2 PPC 405 processors Quad Data Rate SRAMs 512MBytes DDRII SDRAM Configuration Controller/PCI-PCI Bridge Up to 1Gbit NV memory NT RCC-R

  12. NT-RCC Block Diagram RIO A RIO B Parallel RIO Parallel RIO QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 QDR SRAM 1M x 36 COP A Xilinx V2Pro COP B Xilinx V2Pro COP C Xilinx V2Pro COP D XilinxV2Pro 4X3.125 Gbps 4X3.125 Gbps 4X3.125 Gbps Common Bus Serial RIO 4X3.125 Gbps COP SelectMap PCI NIC SelectMap DDRII PCI-PCI Bridge / Config 6 Port Switch Xilinx V2Pro (NIC) Flash Flash Flash DDR II SDRAM 512 Mbyte Power Switch Serial RIO 4X3.125 Gbps cPCI J1 J2 J3

  13. NT-RCC Layout • 24 Layer board • MicroVias, blind vias, via-in-pad • High speed 3.125 Gbps Serial links • 82 pages of schematic capture • 10 weeks of PCB layout time SEAKR NT-RCC

  14. CGA Qualification Developments • Virtex II CGA Qual CF1144 • GSFC Program • 52 boards each with four Xilinx Virtex2 CF1144 BGA packages • 283 thermal cycles from 0 to 100 C • Vibration and shock testing • 35mm x 35mm, 1144 pin CGA, 1mm pitch. • MPC7457 CGQ Qual • 18 boards with 6 CGA packages/board. • 456 thermal cycles -40C to 95C • 29mm x 29mm, 483 pin, 1.27mm BGA pitch

  15. Thermal Management • Design supports 8 watts per FPGA without heat pipes or other active cooling

  16. Low Voltage High Current DC/DC Converters • SEAKR has also developed a Point of Load power supply for low voltage, high current systems. • Programmable voltage down to 1.0V at 12A • 85% efficiency • Mezzanine card for design reuse and flexibility • Originally developed for G4 SBC VPC Back View POL Power Supply

  17. PCI Chassis Application • Client application to interface with SBC • Determines PCI chassis configuration • Sends RCC commands to the SBC • Used for hardware debug and FPGA configuration

  18. RCC Built-in Self Test Application

More Related