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5.8 Exclusive-OR Gates and Parity Circuits

x⊕y=x · y+x · y. x ⊙ y=x · y+x · y. Outputs. Inputs. X Y. x ⊙ y. x⊕y. 0 0 0 1 1 0 1 1. 0 1 1 0 1 0 0 1. Return. Next. 5.8 Exclusive-OR Gates and Parity Circuits. Exclusive-OR(XOR) Gates.

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5.8 Exclusive-OR Gates and Parity Circuits

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  1. x⊕y=x·y+x·y x⊙y=x·y+x·y Outputs Inputs X Y x⊙y x⊕y 0 0 0 1 1 0 1 1 0 1 1 0 1 0 0 1 Return Next 5.8 Exclusive-OR Gates and Parity Circuits • Exclusive-OR(XOR) Gates • Exclusive-NOR(XNOR) Gates

  2. Return Back Next 5.8 Exclusive-OR Gates and Parity Circuits • Equivalent symbols for XOR and XNOR gates (a) XOR gates (b) XNOR gates Prove the upper symbols for XOR and XNOR is equivalent.

  3. 74X280 8 A B C D EVEN E F ODD G H I 9 10 11 5 12 13 6 1 2 4 Return Back Next 5.8 Exclusive-OR Gates and Parity Circuits • Parity Circuits (p413 Figure 5-74) • The 74x280 9-Bit Parity Generator (p414 Figure 5-75)

  4. Return Back 5.8 Exclusive-OR Gates and Parity Circuits • Parity-Checking Applications (p415 Figure 5-76) • Parity Circuits are also used with error-correcting codes (p416 Figure 5-77)

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