指導教授 : 林志明級別 : 碩一學生 : 呂致遠 Mail:s94662010@mail.ncue.tw 民國 95 年 1 月 5 日

A Low-Voltage Folded- Switching Mixer in 0.18-um CMOSVojkan Vidojkovic, Johan van der Tang, Member, IEEE, Arjan Leeuwenburgh, andArthur H. M. van Roermund, Senior Member, IEEEIEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 6, JUNE 2005 指導教授:林志明級別:碩一學生:呂致遠 Mail:s94662010@mail.ncue.edu.tw 民國95年1月5日

Outline • Abstract • Introduction • Transconductors for folded-switching mixers • AC-coupled folded-switching mixer with current-reuse • Die microphotograph • SIMULATION AND EXPERIMENTAL RESULTS • CONCLUSION • REFERENCES

Abstract • Scaling of CMOS technologies has a great impact on analog design. The most severe consequence is the reduction of the voltage supply. • AC-coupled folded-switching mixer with current-reuse

Introduction switching stage Vdd=1v, saturation region Transconductsthe goal is to reduce the voltage drops across the load resistors and the switching transistors

Transconductors for folded-switching mixers Vovn=Vrfdc-Vt Vdd,min=Vov1+Vov2+Vrfdcp-Vrfdcn Vdd,min= Vov1+Vov2+2Vt (Vt of 0.18- umCMOS is in the range of 500mV.) Vovp=Vdd-Vrfdc-Vt

AC-coupled folded-switching mixer with current-reuseA. Gain and Noise Figure G=20log((2/π )gmn+gmp)R) the dc voltage V2 has to be kept sufficiently high and voltage V1 sufficiently low. On the other hand, voltage V1 should be sufficiently high in order to keep the transistors M1and M2 saturated.

AC-coupled folded-switching mixer with current-reuseB. Linearity The deviation d from a linear transfer function between the points A and B The input voltage range between the points A and B is denoted with s

AC-coupled folded-switching mixer with current-reuseC.DC Stability supply voltage variations of 10% and temperature variations ( -25C to 70 C).

Die microphotograph

SIMULATION AND EXPERIMENTAL RESULTS FOM= figure of merit (FOM)

CONCLUSION • A high-gain, low-voltage, low-power ac-coupled foldedswitching mixer with current-reuse is presented. This mixer is designed and implemented in 0.18- m CMOS technology. The main advantages of the proposed new mixer topology are high voltage gain (15.7 dB), moderate noise figure (12.9 dB), moderate linearity (IIP3=1 dBm), operation at low supply voltages (Vdd=1 V), and simplicity since common-mode Feedback is not necessary. Normalizing mixer performance with a figure of merit shows that the ac-coupled folded-switching mixer with current-reuse has excellent performance incomparison with other CMOS mixers.

REFERENCES • [1] V. Vidojkovic et al., “Mixer topology selection for a 1.8–2.5 GHz multistandard front-end in 0.18 mCMOS,” in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), vol. 2, 2003, pp. 300–303. • [2] A. Karanicolas et al., “A 2.7-V 900-MHz CMOS LNA and mixer,”IEEE J. Solid-State Circuits, vol. 31, no. 12, pp. 1939–1944, Dec. 1996. • [3] B. Razavi, Design of Analog CMOS Integrated Circuits. New York, NY: McGraw-Hill, 2001. • [4] C. Debono et al., “A 900 MHz, 0.9 V low-power CMOS down-conversion mixer,” in Proc. IEEE Custom Integrated Circuit Conf. (CICC), 2001, pp. 527–530. • [5] P. Sullivan et al., “Low voltage performance of a microwave CMOS Gilbert cell mixer,”IEEE J. Solid-State Circuits, vol. 32, no. 7, pp. 1151–1155, Jul. 1997. • [6] C. Hermann et al., “A 0.6 V 1.6 mW transformer based 2.5 GHz downconversion mixer with 5.4 dB gain and

指導教授 : 林志明級別 : 碩一學生 : 呂致遠 Mail:s94662010@mail.ncue.tw 民國 95 年 1 月 5 日