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Directory-based Protocol

Interconnection Network. Directory. Directory. Directory. Local Memory. Local Memory. Local Memory. Cache. Cache. Cache. CPU 0. CPU 1. CPU 2. Directory-based Protocol. CPU 0. CPU 1. CPU 2. Directory-based Protocol. Interconnection Network. Bit Vector. X. U 0 0 0. Directories.

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Directory-based Protocol

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  1. Interconnection Network Directory Directory Directory Local Memory Local Memory Local Memory Cache Cache Cache CPU 0 CPU 1 CPU 2 Directory-based Protocol

  2. CPU 0 CPU 1 CPU 2 Directory-based Protocol Interconnection Network Bit Vector X U 0 0 0 Directories X 7 Memories Caches

  3. Read Miss CPU 0 CPU 1 CPU 2 CPU 0 Reads X Interconnection Network X U 0 0 0 Directories X 7 Memories Caches

  4. CPU 0 CPU 1 CPU 2 CPU 0 Reads X Interconnection Network X S 1 0 0 Directories X 7 Memories Caches

  5. X X 7 7 CPU 0 CPU 1 CPU 2 CPU 0 Reads X Interconnection Network X S 1 0 0 Directories Memories Caches

  6. X X 7 7 Read Miss CPU 0 CPU 1 CPU 2 CPU 2 Reads X Interconnection Network X S 1 0 0 Directories Memories Caches

  7. X X 7 7 CPU 0 CPU 1 CPU 2 CPU 2 Reads X Interconnection Network X S 1 0 1 Directories Memories Caches

  8. X X X 7 7 7 CPU 0 CPU 1 CPU 2 CPU 2 Reads X Interconnection Network X S 1 0 1 Directories Memories Caches

  9. X X X 7 7 7 CPU 1 CPU 2 CPU 0 CPU 0 Writes 6 to X Interconnection Network Write Miss X S 1 0 1 Directories Memories Caches

  10. X X X 7 7 7 CPU 1 CPU 2 CPU 0 CPU 0 Writes 6 to X Interconnection Network X S 1 0 1 Directories Invalidate Memories Caches

  11. X 7 CPU 0 CPU 1 CPU 2 CPU 0 Writes 6 to X Interconnection Network X E 1 0 0 Directories Memories Caches X 6

  12. X X 7 6 CPU 0 CPU 1 CPU 2 CPU 1 Reads X Interconnection Network Read Miss X E 1 0 0 Directories Memories Caches

  13. X X 7 6 CPU 0 CPU 1 CPU 2 CPU 1 Reads X Interconnection Network Switch to Shared X E 1 0 0 Directories Memories Caches

  14. X X 6 6 CPU 0 CPU 1 CPU 2 CPU 1 Reads X Interconnection Network X E 1 0 0 Directories Memories Caches

  15. X X X 6 6 6 CPU 0 CPU 1 CPU 2 CPU 1 Reads X Interconnection Network X S 1 1 0 Directories Memories Caches

  16. X X X 6 6 6 CPU 1 CPU 2 CPU 0 CPU 2 Writes 5 to X Interconnection Network X S 1 1 0 Directories Memories Write Miss Caches

  17. X X X 6 6 6 CPU 1 CPU 2 CPU 0 CPU 2 Writes 5 to X Interconnection Network Invalidate X S 1 1 0 Directories Memories Caches

  18. X 6 CPU 0 CPU 1 CPU 2 CPU 2 Writes 5 to X Interconnection Network X E 0 0 1 Directories Memories X 5 Caches

  19. Write Miss X X 6 5 CPU 0 CPU 1 CPU 2 CPU 0 Writes 4 to X Interconnection Network X E 0 0 1 Directories Memories Caches

  20. X X 6 5 CPU 0 CPU 1 CPU 2 CPU 0 Writes 4 to X Interconnection Network X E 1 0 0 Directories Memories Take Away Caches

  21. X X 5 5 CPU 0 CPU 1 CPU 2 CPU 0 Writes 4 to X Interconnection Network X E 0 1 0 Directories Memories Caches

  22. X 5 CPU 0 CPU 1 CPU 2 CPU 0 Writes 4 to X Interconnection Network X E 1 0 0 Directories Memories Caches

  23. X X 5 5 CPU 0 CPU 1 CPU 2 CPU 0 Writes 4 to X Interconnection Network X E 1 0 0 Directories Memories Caches

  24. X 5 CPU 0 CPU 1 CPU 2 CPU 0 Writes 4 to X Interconnection Network X E 1 0 0 Directories Memories Caches X 4

  25. X X X 5 4 4 CPU 1 CPU 2 CPU 0 CPU 0 Writes Back X Block Interconnection Network Data Write Back X E 1 0 0 Directories Memories Caches

  26. X 4 CPU 0 CPU 1 CPU 2 CPU 0 Writes Back X Block Interconnection Network X U 0 0 0 Directories Memories Caches

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