Designing an Operating System for a Heterogeneous Reconfigurable SoC

Designing an Operating System for a HeterogeneousReconfigurableSoC Vincent Nollet, P. Coene, D. Verkest, S. Vernalde, R. Lauwereins IMEC, Belgium

+ Create an Operating System that supports the use of Reconfigurable Logic. What is this all about ? RTOS ISP Reconfigurable Logic Vincent Nollet – IMEC - RAW'03

Outline • OS introduction • What ? Why ? How ? • Related work • Who ? What ? • OS support implemented in hardware • What ? Why ? How ? • Operating System components • Operating System Structures • Inter-task Communication • Task Scheduling & Task Relocation • Kindergarten Components • Implementation details • Conclusions & future work Vincent Nollet – IMEC - RAW'03

Outline • OS introduction • What ? Why ? How ? • Related work • Who ? What ? • OS support implemented in hardware • What ? Why ? How ? • Operating System components • Operating System Structures • Inter-task Communication • Task Scheduling & Task Relocation • Kindergarten components • Implementation details • Conclusions & future work Vincent Nollet – IMEC - RAW'03

OS for Reconfigurable Systems (OS4RS) RTOS Hardware Abstraction Layer ISP Reconfigurable Logic OS Introduction • What ? A management infrastructure that enables a system to handle multiple, concurrently executing heterogeneous applications • Why ? Heterogeneous applications should be able to benefit from the same OS abstractions/functionality as regular software applications • Managing the available computing resources • Providing a suited environment • How ? By extending an existing Operating System Vincent Nollet – IMEC - RAW'03

No use of Tetris-like circuit transformations Use of hardware support to implement these services Task preemption/relocation based on cooperative scheduling Related Work • Burns et al. • Having a set of run-time support functions commonly used by all applications: reconfigure the FPGA, reserve a chunk of FPGA area and the ability to transform a circuit. • Wigley et al. • Java based OS, linked to Xilinx JBits • Describe their fundamental OS services to manage the FPGA: resource allocation, application placement and routing • Simmler et al. • Preemptive multitasking on FPGAs through bitstream manipulation • Controlled by “hardware manager software” Vincent Nollet – IMEC - RAW'03

OS support implemented in hardware • What ? • It is quite common for contemporary microprocessors to have built-in Operating System support. • Hardware support enables/facilitates certain OS functions • Why ? • Facilitate/accelerate the basic FPGA management functions like resource allocation, task placement and routing • How ? • By putting an extra layer of abstraction on top of the ‘bare FPGA’ OS4RS RTOS Hardware Abstraction Layer Hardware OS support structure InterConnection Network (ICN) ISP FPGA Vincent Nollet – IMEC - RAW'03

OS support implemented in hardware The Interconnection Network (ICN) On-FPGA packet switched network Provides a number of fixed sized hardware tiles that can be reconfigured by means of partial reconfiguration Communication is done through the fixed ICN-Tile interface by means of message passing Communication is handled by ICN routers, controlled by routing tables provided by the Operating System Source: T. Marescaux Vincent Nollet – IMEC - RAW'03

Outline • OS introduction • What ? Why ? How ? • Related work • Who ? What ? • OS support implemented in hardware • What ? Why ? How ? • Operating System components • Operating System Structures • Task Scheduling & Task Relocation • Inter-task Communication • Kindergarten Components • Implementation details • Conclusions & future work Vincent Nollet – IMEC - RAW'03

OS4RS Structures • Processor Information Structure • Represents an OS4RS computing resource (ISP, ICN Tile,…) • Allows the OS4RS to manage and monitor the computing resources • Enables support for Hot-Pluggable computing resources • Task information structure • Required to store OS4RS information • List of available task representations • Info about the task state (e.g. assigned, relocating, …etc) • …etc • Linked to the processor-local task structure Vincent Nollet – IMEC - RAW'03

ICN Tile1 One task only ICN Tile2 One task only OS4RS Task Scheduling • Task Scheduling • Two level scheduling • Top Scheduler is responsible for processor assignment • Processor local schedulers handle local temporal scheduling ICN Tile1 task pool ICN Tile1 local scheduler Global task pool Top Scheduler ICN Tile2 task pool ICN Tile2 local scheduler ISP task pool ISPlocal scheduler Vincent Nollet – IMEC - RAW'03

switch switch signal ISP Heterogeneous Task Relocation • What ? Relocating a task at run-time from one type of processor to another one (e.g. from reconfigurable logic to ISP) with minimal interference • Why ? Optimal/Fair use of computing resources (e.g. according to a QoS) • How ? Cooperative scheduling by means of switchpoints (i.e. dedicated points of preemption inserted by the application designer). OS4RS FPGA Vincent Nollet – IMEC - RAW'03

OS4RS Communication API HAL ISP FPGA PA P3 P2 PC P1 PN PB Inter-task communication • Uniform Inter-Task Communication What ? • Uniform communication scheme for all tasks • Based on message passing Why ? • Relocating a task should not affect communication • Message passing is natively supported by the ICN How ? Vincent Nollet – IMEC - RAW'03

Kindergarten components • Application Binary Interface • Describes how a (binary) application gains access to the Operating System services • How can tasks running on the FPGA make a system call ? • How to incorporate and manage multiple binaries of the same task in a file ? • OS security ? • Still a need to enforce the classic OS protection mechanisms • Allowing foreign hardware results in new security issues • The OS4RS should be more than just a hardware loader Vincent Nollet – IMEC - RAW'03

Implementation details • OS4RS manages a proof-of-concept platform StrongARM-1110 ISP Xilinx Virtex II FPGA • OS4RS implementation details • Build as an extension to RTAI 24.1.9 for StrongARM • Extension that creates a RTOS underneath Linux • Minimal changes into RTAI (~ 150 lines source code) • OS4RS is build using several (Linux) modules • OS4RS core extensions are about 150kB • OS4RS task setup: ~108 ms (ICN tile) ~100 s (ISP) • The applications… • 3D game: two ISP tasks, one heterogeneous task. • Video decoding: two ISP tasks, one heterogeneous task. Vincent Nollet – IMEC - RAW'03

And to conclude … • What we have … • The Operating System for Reconfigurable Systems provides an environment where heterogeneous applications can execute concurrently, with minimal interference between them, but with support for inter-task communication. • Build as an extension to an existing OS • Heterogeneous task scheduling/relocation • Uniform inter-task communication • …the show goes on… • Continue development on the present OS4RS modules • Raise the kindergarten modules • Heterogeneous task design issues • … Vincent Nollet – IMEC - RAW'03

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Designing an Operating System for a Heterogeneous Reconfigurable SoC