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Introduction to VHDL

Introduction to VHDL. ECE-331, Digital Design Prof. Hintz, minor changes by Dr. Gaj Electrical and Computer Engineering. VHDL. V ery High Speed Integrated Circuit (VHSIC) H ardware D escription L anguage . VHDL.

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Introduction to VHDL

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  1. Introduction to VHDL ECE-331, Digital Design Prof. Hintz, minor changes by Dr. Gaj Electrical and Computer Engineering 331_5

  2. VHDL Very High Speed Integrated Circuit (VHSIC) Hardware Description Language 331_5

  3. VHDL • International IEEE Standard Specification Language (IEEE 1076-1993) for Describing Digital Hardware • A Formal Language • Specification of designs • Simulation of performance • Interface to hardware detail design tools 331_5

  4. Why VHDL? • The Complexity and Size of Digital Systems leads to • Breadboards and prototypes which are too costly • Software and hardware interactions which are difficult to analyze without prototypes or simulations • Difficulty in communicating accurate design information 331_5

  5. VHDL Brief History • Very High Speed Integrated Circuit (VHSIC) Program • Launched in 1980 by DARPA • Goal was to achieve significant gains in VLSI technology • Need for common descriptive language 331_5

  6. VHDL Brief History • July 1983 • Intermetrics, IBM and Texas Instruments were awarded a contract to develop VHDL • August 1985 • Release of final version of the language under government contract, VHDL Version 7.2 • December 1987 • IEEE Standard 1076-1987 331_5

  7. VHDL Brief History • 1988 • VHDL became an ANSI standard • September 1993 • IEEE VHDL standard revised • VHDL Has Been Accepted As a Draft International Standard by the IEC 331_5

  8. VHDL Model Components • Complete VHDL Component Description Requires • Entity • Defines a component’s interface • Architecture • Defines a component’s function • Several Alternative Architectures May Be Developed for Use With the Same Entity 331_5

  9. VHDL Entity • The Primary Purpose of an Entity Is to Declare the Input and Output Signals Which Communicate With It • Interface signals are listed in the PORT clause which has 3 parts • Name • Mode • Data type 331_5

  10. VHDL Entity Example entity OR3 is port( A, B, C :inbit; D :outbit); end OR3; 331_5

  11. VHDL Architecture • The Purpose of Architectures Is to Describe Alternative Implementations of an Entity • There can be (usually are) Multiple Architecture Bodies • Only one associated with an entity at a time • Describe the entity in accordance with different models 331_5

  12. Lexical Elements of VHDL • Comments • Two dashes to end of line is a comment, e.g., • --this is a comment • Special Symbols • Single characters • & ‘ ( ) * + , - . / : ; < = > | • Double characters (no intervening space) • => ** := /= >= <= <> 331_5

  13. Lexical Elements of VHDL • Basic Identifiers • Only alphabetic letters ( A-Z, a-z ), or • Decimal digits ( 0-9 ), or • Underline character ( _ ) • Must start with alphabetic letter ( MyVal ) • Not case sensitive ( LastValue = = lAsTvALue) • May NOT end with underline ( MyVal_ ) • May NOT contain seq. underlines (My__Val) 331_5

  14. Lexical Elements of VHDL • Extended Identifiers • Any and all characters enclosed by \ \ • Case IS significant • Extended identifiers are distinct from basic identifiers • If “ \ ” is needed in extended identifier, use “ \\ “ • Reserved Words • Do not use as identifiers 331_5

  15. Lexical Elements of VHDL • Numbers • Underlines are NOT significant ( 10#8_192 ) • Exponential notation OK ( 46e5 , 98.6E+12 ) • Integer Literals ( 12 ) • Only positive numbers, negative numbers preceded by unary negation operator • No radix point 331_5

  16. Lexical Elements of VHDL • Real Literals ( 23.1 ) • Always include decimal point • Radix point must be preceded and followed by at least one digit. • Radix ( radix # number expressed in radix) • Any radix from binary ( 2 ) to hexadecimal ( 16 ) • Numbers in radices > 10 use letters a-f for 10-15. 331_5

  17. Lexical Elements of VHDL • Characters • Any printable character including space enclosed in single quotes ( ‘x‘ ) • Bit Strings • B for binary ( b”0100_1001” ) • O for Octal ( o”76443” ) • X for hexadecimal ( x”FFFE_F138” ) 331_5

  18. Lexical Elements of VHDL • String • A sequence of any printable characters enclosed in double quotes ( “a string” ) • Quote using double quote ( “ he said ““no!”” “) • Strings longer than one line use the concatenation operator ( & ) at the beginning of a continuation line. 331_5

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