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Computer Memory: Some Extra Topics

Computer Memory: Some Extra Topics. Edward Bosworth TSYS School of Computer Science Columbus State University Lecture for CPSC 5155. Merging Write Buffer. Precise Definition of Virtual Memory.

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Computer Memory: Some Extra Topics

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  1. Computer Memory:Some Extra Topics Edward Bosworth TSYS School of Computer Science Columbus State University Lecture for CPSC 5155

  2. Merging Write Buffer

  3. Precise Definition of Virtual Memory • Virtual memory is a mechanism for translating logical addresses (as issued by an executing program) into actual physical memory addresses. • This definition alone provides a great advantage to an Operating System, which can then allocate processes to distinct physical memory locations according to some optimization.

  4. Single Cache Here is a diagram of a standard single level cache. We ignore split caches, as splitting does not affect our timing equations. Note that the fraction of memory references not handled by the cache is given by (1 – h1). One standard equation for the effective access time of this memory is: TE= h1 T1 + (1 – h1)  TM

  5. Two Variants of the equation for TE (Effective Access Time) • This is also called AMAT (Average Memory Access Time) • Define the following terms: T1 the time for a hit in the cache. • TM the time for accessing the main memory • TP the time penalty for accessingthe main memory. • Our formula was: TE = h1 T1 + (1 – h1)  TM • But note that TM = T1 + TP. • Thus we have: TE = h1 T1 + (1 – h1)  ( T1 + TP ) • = h1 T1 + (1 – h1)  T1 + (1 – h1)  TP • = T1 + m1 TP • Where m1 = (1 – h1) is miss rate on the cache.This is the book’s formula.

  6. Two–Level Cache Here is a two–level cache organization. • Note the fractions of interest. • Fraction of memory references handled by the L1 cache h1 Fraction of memory references passed to the L2 cache (1 – h1) Fraction of memory references handled by the L2 cache (1 – h1)h2 Fraction of memory references passed to main memory (1 – h1)(1 – h2) Here is one variant of the equation for the effective access time of this memory: TE= h1 T1 + (1 – h1) h2 T2 + (1 – h1)  (1 – h2)  TM.

  7. Another View of the Two–Level Cache • The two–level cache is acting as a larger cache with a hit rate given by 1 – h = (1 – h1)(1 – h2) • A bit of algebra yieldsh=h1 + h2 – h1h2 • Look again at the formula above • TE = h1 T1 + (1 – h1) h2 T2 + (1 – h1)  (1 – h2)  TM. • This has the form for a single–level cache • TE = TC + m1 TP • Where TC = h1 T1 + (1 – h1) h2 T2is the cache hit time. • TP = (1 – h1)  (1 – h2)  TM is the cache miss penalty.

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