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Interface Design Connections

Interface Design Connections. Omid Fatemi. Compute. Convey. Cooperate. Typical Interface Design. Connect. Sense Reality Touch Reality Connect Transform. Embedded Systems Micros Assembler, C Real-Time Memory Peripherals Timers DMA. Busses Protocols Standards PCI IEEE488 SCSI

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Interface Design Connections

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  1. Interface DesignConnections Omid Fatemi

  2. Compute Convey Cooperate Typical Interface Design Connect Sense Reality Touch Reality Connect Transform Embedded Systems Micros Assembler, C Real-Time Memory Peripherals Timers DMA Busses Protocols Standards PCI IEEE488 SCSI USB & FireWire CAN PC interfaces HCI

  3. Transducer Signal • varying current or voltage for analog signals • varying duty cycle or pulse widths • micro or milli values to large values • sensor signal will also contain some element of noise • at some resolution of the signal, the amount of noise becomes relevant • the signal to noise ratio is often noted as S/N

  4. Problems • Signals have low values. (low level milli volt signals) • Sensors are remote to DAQ board  long cable • Electromagnetic interference (EMI) • Non ideal grounding • Thermal noise

  5. Transportation Costs • If sensor is integrated with the computing system (on-chip), then there is less chance of noise from the signal being transported through the real world over connecting wires. • External sensors must connect to the computing elements through some sort of wiring arrangement which can create noise.

  6. Noise Source in Resistive Devices • above absolute zero, all materials have random thermal motion which gives rise to uncertainty in a material’s thermal energy. • This leads to uncertainty in the dissipated electrical power of a resistor or noise in a signal

  7. Resistor Noise • findings of J.B. Johnson in 1928 • white noise is a combination of all frequencies like white light • amount of noise increases with resistance and bandwidth

  8. Other Sources • Electric fields • Capacitive coupling • Magnetic fields • Inductive coupling (close range) • Electromagnetic wave • Proportional to loop area and frequency • Conducted interference • Ground noise

  9. Review of Capacitive Coupling A I I A A B + - V A 1) The creation of a voltage difference from A to B produces an electric field in the volume between A and B. The energy in this field is proportional to V . A 2) As V increases, a current I flows into plate 1. An A A equal current flows out of plate 2. Thus plates 1 and 2 accumulate electric charges of equal magnitude but opposite sign. The quantity of accumulated (stored) charge depends on several factors:

  10. Review of Inductive Coupling A I B B I + A V - B + V - A 1) The creation of current I through loop A produces a A a magnetic field in the volume surrounding loop A. The energy stored in this field is proportional to I . A 2) The area of loop B intersects magnetic flux from the magnetic field surrounding loop A. The quantity of flux intersected depends on several factors:

  11. Digital to Analog Coupling • fast changing digital signals can capacitively couple noise into neighboring analog signals

  12. Ground Noise • different ground resistances (milli-ohms) can cause different voltages on ground loops • separate ground wire is better but costlier

  13. Ignore Noise for Large Signals • if signal is much larger than the noise and it is a digital signal (resolution is 2), the noise can be ignored • around a building you can get noise from 1-100 mv in the signal cable

  14. Signal Loss • voltage from transducer is divided between internal resistance and resistance of the amplifier • the error increases with small Rdiff and large Verr • this is why high input impedance on an amplifier is important to get most of the signal

  15. Differential Signals (Balanced Input) • a signal that is the difference between two signals is known as a differential signal • normal mode is when the signals differ; common mode is when they both change the same • common mode rejection ratio is the the ratio of an amplifiers response to normal / common mode signals • For signals below 1 MHz

  16. Differential Amplification • Common Mode: Two signals change input levels together. • Normal Mode: Two signals have a differential change • A differential amplifier has a high “Common Mode Rejection Ratio”

  17. Twisted Pairs and Shielding Shielded twisted pair cabling makes noise signals as common mode A good example of long cabling: Telephone company

  18. Common Mode Interference Rejection

  19. Single Ended Inputs • Shield and negative lead are grounded

  20. Floating Signal Shield Grounding • A shield on a cable should be grounded at the amplifier end only. • Grounding at both ends generated ground loops • Grounding at amplifier side prevents signal floating near threshold voltages

  21. The Correct Grounding

  22. Grounded Small Signal Shielding

  23. High Frequency Bypass • high frequency noise can be bypassed on an amplification stage by using a bypass capacitor

  24. Amplify at the Transducer • If we put a preamplifier to boost the sensor signal and reduce the source impedance we can improve the S/N ratio

  25. Current Loop • small current run to detect open circuits • signal changes current from 4 to 20 milliamps • can use 250 ohm resistor to change to 1-5V

  26. Analog Multiplexor for Multiple Inputs

  27. Propagation Delay V V in out V in 50% time t t pd1 pd0 V out 50% time t t t t 1 4 2 3 Note: typically, t = t due to variations in pd0 pd1 carrier storage times in the transistors, differences in output drive impedances to L and H, etc. 1 ) Propagation delay, t ( t + t = pd pd0 pd1 2

  28. Slow Digital Circuits 1) Conventional Logic (low to medium speed) >> propagation delays propagation delays through logic elements through wiring --- relatively slow signal rise and fall times t , t > 10 ns r f --- circuit size is much less than the wavelength of the highest frequency signals --- can safely neglect the parasitic R, L, and C of wiring when modeling signal propagation --- can safely use lumped models of circuit elements

  29. High Speed Logic 2) High-Speed Logic ~ propagation delays propagation delays = through wiring through logic elements --- fast signal rise and fall times t , t < 5 ns r f --- circuit size is greater than or equal to the wavelength of the highest frequency signals --- must consider parasitic R, L, and C of wiring when modeling signal propagation --- must use combination of distributed and lumped models of circuit elements

  30. Noise Margins --- a noise margin is a parameter that represents the maximum noise voltage that can be present on the input of a logic gate without affecting the logical level of the gate’s output --- separate noise margins are usually defined for the L and H voltage levels V CC V NM OHmin H V IHmin V ILmax NM L V OLmax GND = minimum high voltage output by a gate V OHmin = maximum low voltage output by a gate V OLmax V = minimum input voltage interpreted as a H IHmin V = maximum input voltage interpreted as a L ILmax - V Low noise margin, NM = V L OLmax ILmax High noise margin, NM = - V V H OHmin IHmin

  31. Summary

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