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DAQ for BTF

DAQ for BTF. Jean-Sebastien Graulich, Geneva. BTF Overview Hardware Overview DAQ Software Description What’s next Summary. BTF Overview. Hardware Overview. TOF Detector: A couple of slabs, mounted with R4998 Pmts FEE Configurations MICE baseline

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DAQ for BTF

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  1. DAQ for BTF Jean-Sebastien Graulich, Geneva • BTF Overview • Hardware Overview • DAQ Software Description • What’s next • Summary Jean-Sébastien Graulich

  2. BTF Overview Jean-Sébastien Graulich

  3. Hardware Overview • TOF • Detector: A couple of slabs, mounted with R4998 Pmts • FEE Configurations • MICE baseline Constant Fraction Discriminator (either VME or NIM) CAEN TDC V1290 (32 ch, 25 ps LSB) • Comparison basis Active Splitter (recuperated from HARP) Constant Fraction Discriminator (either VME or NIM) CAEN TDC V1290 (32 ch, 25 ps LSB) CAEN QDC V792 (32 ch, 100 fC LSB) • FEE test SIS 3320 200 MHz Flash ADC Time over Threshold Discriminator (NINO) • EmCal • Detector: A couple of modules, mounted with R1355 Pmts • FEE Configuration • Same as for TOF Jean-Sébastien Graulich

  4. Hardware Overview • DAQ • 1 VME Crate, brought from Geneva • Stand alone PC, brought from Geneva • VME/PCI Interface • CAEN V2718 with optical link to the PC • Trigger • 1 NIM crate for trigger logic, available on site • Very simple logic, standard NIM modules Jean-Sébastien Graulich

  5. DAQ Software description • Software choice • DATE (ALICE DAQ) not available in time • UNIDAQ was an option but • No know-how in Geneva and no real interest in getting this know-how… • Dedicated home made software • Provides good training • Limited to single VME-crate/single PC DAQ • Architecture Monitor GUI Run Control GUI Readout Monitor Read binary file Initialization Write Root file Write Binary file Readout Local Disk Vme Modules Jean-Sébastien Graulich

  6. Run Control GUI Jean-Sébastien Graulich

  7. Readout Process • Polling loop on V2718 Input Arm Modules Max N_events reach Or Stop Request yes Disarm Modules Reset Output Level (not Ready) no no Input Level is Set Stop yes Reset Output Level (not Ready) Readout Modules and Write on Disk N_events ++ Set Output Level (Ready) Jean-Sébastien Graulich

  8. Readout Process • Read out TDC and ADC works in Single- an/or Multi-Event Mode • Readout of V1X90: up to ~20 MB/s, much less if the number of hits is small Readout of 32 hits takes about 40 ms • Readout of V792: limited to ~0.5 MB/s (Block Transfer is not working), good enough for BTF Readout of 32 hits takes about 600 ms • Readout loop is artificially slowed down to leave some CPU time for the monitoring -> Limited to 50 Hz Should this limit be removed, the readout process can cope with up to 10 kHz (in Multi-Event Mode). Jean-Sébastien Graulich

  9. MDvirtualModule MDbtfAcq MDvmeInterface • _moduleType • _name • _vmeInterface* • _moduleList<MDvirtualModule*> • _type StartRun() OpenDataFile() ArmDaq() AcqLoop() StopRun() ReadCycle() WriteCycle() ReadBLT() WriteBLT() Readout() Arm() Initialize() MDvmeModule • _baseAddress • _dataBuffer ReadDataBuffer() SetRegister() GetRegister() MDv792 MDv1290 • _controlRegister • … • _controlRegister • … ReadDataBuffer() ReadDataBuffer() Readout Process • OO structure: ->Adding/removing modules from the acquisition is very easy (providing the readout software for the module) Jean-Sébastien Graulich

  10. Monitor Process • Read data on local disk, as soon as they are written • Decode the data • Fill histograms • Fill ROOT TTree • Broadcast histograms on a Socket every few events • The Monitor GUI is actually a ROOT macro, spying on the socket. Jean-Sébastien Graulich

  11. Monitor GUI Jean-Sébastien Graulich

  12. Monitor GUI Jean-Sébastien Graulich

  13. What’s next • Check portability of the software • Already installed in Milano. Tests are under way. • Test of FEE options • Struck SIS3320 200 MHz Flash ADC Readout OK Shaper under design Studying the ultimate time resolution we can obtain • Time over threshold Discriminator Not started yet Plan: - First design and produce the transformer Coax->Differential - Connect to V1190 (100 ps LSB) with Leading and Trailing Edge measurements • Clarify needs for Calibration • Add TDC V775 (?) • To be discussed with Ludovico and Maurizio Jean-Sébastien Graulich

  14. Summary • BTF will use an homemade DAQ software • DAQ software for BTF is ready • Dedicated stand alone PC (single processor) • Running Stable at 50 Hz • FEE electronics tests are under way • There is hope to be ready with the Flash ADC • Time over Threshold will not be ready (Test can be done later without beam) Jean-Sébastien Graulich

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