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Reachability Analysis

Reachability Analysis. Kuang -Jung Chang Advisor : Chun-Yao Wang Date: 2008.07.29. Outline. Introduction BDD partitioning. Reachability Analysis. Given: A sequential circuit An initial state set Objective: The reachable state set from the initial state set. Finite State Machine.

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Reachability Analysis

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  1. Reachability Analysis Kuang-Jung Chang Advisor : Chun-Yao Wang Date: 2008.07.29

  2. Outline • Introduction • BDD partitioning

  3. Reachability Analysis • Given: • A sequential circuit • An initial state set • Objective: • The reachable state set from the initial state set Finite State Machine Finite State Machine Finite State Machine R0 R1 R2 R3 Fixed point

  4. Sequential Circuit • A set of primary inputs (PI): w0~wm • A set of outputs (PO): O0~Ol • A set of flip-flops: ff0~ffn • Pseudo primary input (PPI): x0~xn • Pseudo primary output (PPO): y0~yn • Output function: • A completely specified function with domain (X  W) and range O • Transition relation: • A completely specified function with domain (X  W) and range Y Combinational part of a circuit W O X Y Flip-flops

  5. Sequential Equivalence Checking • The product machine (sequential miter) of circuit A and circuit B Combinational part of circuit A W ZA W XA YA Flip-flops A Combinational part of circuit B ZB XB YB Flip-flops B

  6. Why Reachability Analysis • State minimization • Logic optimization • Sequential ATPG • Property checking State space Unused state Don’t care Undetected error Fake bug

  7. Difficulties of Reachability Analysis • Huge state space • The large number of flip-flops in a sequential circuit • Complicated Finite State Machine • 2|flip-flop| 2|PI|

  8. Symbolic Image Computation • The characteristic function of PPO yi and latch transition relation TRi • The transition relation TR is the conjunction of the latch transition relations • Fi(X, W) → { 0, 1 } • TRi (yi, X, W) • = yi Xnor Fi(X, W) • TR(Y, X, W) • =  TRi(yi, X, W) yi Fi’ Fi TR( Y, X, W) Fi(X, W) 0 0 1 1 0 0 1 1

  9. Symbolic Image Computation • Representation of state set S • Flip-flop BDD variables: l0~ln • The characteristic representation • S(L) = 1 iff L  state set S l0 l1 l1 l2 l2 l2 l2 1 0 1 0 0 1 1 0

  10. Symbolic Image Computation • Basic symbolic image computation • Nex(Y) =  X, WTR(Y, X, W)  Pre(X) Quantification  X, W BDD AND TR( Y, X, W) Pre(X) Nex(Y) 0 1 0 1 0 1

  11. Binary Decision Diagram • Free BDD (FBDD) : variables can appear only once in a given path from the source to the terminal • Ordered BDD : an FBDD with the additional restriction that variables follow a common ordering in all paths • Reduced OBDD : no two nodes in an OBDD represent the same function

  12. Size of BDD • The size of an ROBDD is strongly dependent on its ordering of variables • 1. Reordering • 2. ROBDD => FBDD • 3. Change the function decomposition associated with the nodes • Functional Decision Diagrams (FDDs)

  13. Synchronous circuit • v0’ = ﹁ v0 • v1’ = v0 ⊕ v1 • v2’ = (v0 Λ v1) ⊕ v2 • TR0 = (v0’  ﹁ v0) • TR1 = (v1’  v0 ⊕ v1) • TR2 = (v2’  (v0 Λ v1)⊕ v2) • TR = TR0 Λ TR1 Λ TR2

  14. Asynchronous circuit • Synchronous : TR = TR0 Λ TR1 Λ TR2 • Conjunctive partition • Asynchronous : TR = TR0 ν TR1 ν TR2 • Disjunctive partition

  15. Partition transition relation • Nex(Y) =  X, WTR(Y, X, W)  Pre(X) • Conjunctive : TR = TR0 Λ TR1 Λ TR2 • Nex = TR0 Λ TR1 Λ TR2 Λ Pre • Disjunctive : TR = TR0 ν TR1 ν TR2 • Nex = (TR0 ν TR1 ν TR2) Λ Pre = (TR0 Λ Pre)ν (TR1 Λ Pre)ν (TR2 Λ Pre) = Nex0 + Nex1 +Nex2

  16. Why disjunctive partition • The monolithic TR is difficult or even impossible to obtain • TR0 ^ TR1 ^ TR2 : existential quantification and logical conjunction cannot distribute

  17. Disjunctive partition

  18. Disjunctive partition

  19. Experimental results • DAC 97

  20. Experimental results TCAD 99

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