1 / 9

Appendix B The Basic of Logic Design

Appendix B The Basic of Logic Design. B.3 Combinational Logic. Decoders:. Multiplexors. 2 ×1 Mux: A 32-bit wide 2 ×1 Mux:. B.5 Constructing a Basic Arithmetic Logic Unit. A 1-Bit ALU. A 32-Bit ALU. A 1-bit ALU that perform AND, OR, addition and subtraction:. NOR.

agrimes
Download Presentation

Appendix B The Basic of Logic Design

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Appendix BThe Basic of Logic Design

  2. B.3 Combinational Logic Decoders:

  3. Multiplexors 2×1 Mux: A 32-bit wide 2×1 Mux:

  4. B.5 Constructing a Basic Arithmetic Logic Unit A 1-Bit ALU

  5. A 32-Bit ALU

  6. A 1-bit ALU that perform AND, OR, addition and subtraction: NOR

  7. Tailoring the 32-Bit ALU to MIPS • slt that is, a 1 if a-b is negative and 0 if it’s positive  sign bit

  8. The final 32-bit ALU

  9. B.8 Register Files

More Related