Comparison between Continuous-Time Asynchronous and Discrete-Time Synchronous Iterative Decoding

1. Comparison between Continuous-Time Asynchronous and Discrete-Time Synchronous Iterative Decoding By Saied Hemati and Amir H. Banihashemi Department of Systems and Computer Engineering Broadband Communications and Wireless Systems (BCWS) Centre Carleton University Ottawa, Ontario, Canada

2. Outline • Introduction and Motivation • Dynamics of Continuous-Time Asynchronous Analog Implementation of Iterative Decoding • Successive over Relaxation (SOR) • SOR vs. Successive Substitution (SS): Performance and Speed of Convergence • Concluding Remarks

3. Introduction and Motivation • Iterative decoding algorithms are used to decode turbo and LDPC codes • Analog implementation to improve the power/speed ratio and area consumption • Morez et al., 2000 • Loeliger et al., 2001 • Mondragon-Torres et al., 2003 • Gaudet et al., 2003 • Hemati et al., 2003 • Winstead et al., 2004 • Amat et al., 2004 • We demonstrate that analog decoding performs intrinsically better than discrete-time decoding

4. Main ideas: i) Analog decoding can be modeled by a set of non-linear differential equations ii) Iterative decoding can be modeled as a fixed-point problem iii) Conventional iterative decoding is the application of successive substitution (SS) to the fixed-point problem iV) Analog decoding is the application of successive over relaxation (SOR) to the fixed point problem V) SOR has a much better rate of convergence than SS

5. LDPC codes and iterative decoding • Iterative coding schemes, such as turbo codes and LDPC codes, provide excellent performance/complexity tradeoff. • Iterative decoding can be naturally described using graph representations (Tanner graph (TG)). • For linear block codes: Check Nodes I II III 1 2 3 7 6 5 4 Variable Nodes

6. Iterative Decoding as a Fixed-Point Problem • Ideally, iterative decoding converges to a fixed-point X and the hard-decision assignment corresponding to X is the MAP solution • Iterative Decoding: Finding a solution for the fixed-point problem based on iterative numerical methods • Conventional iterative decoding with flooding schedule = Successive Substitution:

7. Analog Implementation of Iterative Decoding • Dynamics of analog decoders, even if they are designed based on flooding schedule framework, is different than that of discrete-time synchronized decoders. • Why? - Absence of global synchronization - Different computational modules have different processing delays - Different propagation delays for edge connections

8. Dynamics of Analog Decoding

9. Dynamics of Analog Decoding Different numerical methods can be used to solve this initial-value problem

10. Dynamics of Analog Decoding • Initial-Value Problem: • Forward and Backward Euler Methods:

11. Time responses (output LLRs) of Analog MS Decoder for (7,4) Hamming code (Using our Model)

12. Time responses (output LLRs) of Analog MS Decoder for (7,4) Hamming code (Circuit Simulation)

13. Dynamics of Analog Decoding • Our simple model provides good approximation for the output signals of the decoder • Why not Circuit Simulation? - Circuit Simulation: A circuit with about 1600 short-channel MOSFET transistors - Our Model: A first-order differential equation with 12 variables • Shortcoming: Our model is not capable of incorporating the precise characteristics of different circuit elements and is thus less accurate

14. Dynamics of Analog Decoding

15. Summary of Results • Although delay distribution can affect the transient response (small N) of analog decoder, this effect becomes negligible for steady-state response (large N). • As β→0, SOR supercedes SS considerably in the convergence rate. This means analog decoding outperforms conventional discrete-time decoding. • Simulation Results: BP in LR and MS in LLR domain; two codes: regular (504,252) and irregular (1268,456); BPSK over AWGN channel; symmetric truncated Gaussian distribution for delays over [10∆t , 1000∆t].

16. Effect of delay distribution on BP for (504,252) code; (σ/∆t =0: '__' , σ/∆t =19.8 : '_ _', σ/∆t =198 : '_ . ' ,and σ/∆t =1980: '__' )

17. BER of (1268, 456) code vs. β (Relaxed BP) for N=200 ( _._ ) and 10,000 ( ___ ) and different Eb/N0 values

18. BER ( ___ ) and WER( _ . _ ) curves for (1268, 456) code, decoded by relaxed BP (N=10,000 and β = 0.05) ( ), and conventional BP with flooding schedule (o)

19. Average number of iterations vs. β at different Eb/N0 values for (1268, 456) code (N=10,000), decoded by Relaxed BP

20. BER ( __ ) and WER ( _._ ) curves for (504,252) code decoded by Relaxed BP (N=10,000, β = 0.05) ( ), and conventional BP with flooding schedule (o)

21. BER of (1268, 456) code vs. β (Relaxed MS) for N=200 ( _._ ) and 10,000 ( ___ ) and different Eb/N0 values

22. BER ( ___ ) and WER( _ . _ ) curves for (1268, 456) code, decoded by relaxed MS (N=10,000 and β = 0.3) ( ), and conventional MS with flooding schedule (o)

23. Average number of iterations vs. β at different Eb/N0 values for (1268, 456) code (N=10,000), decoded by Relaxed MS

24. BER ( __ ) and WER ( _._ ) curves for (504,252) code decoded by Relaxed MS (N=10,000, β = 0.4) ( ), and conventional MS with flooding schedule (o)

25. Concluding Remarks • We model continuous-time asynchronous analog iterative decoding by a first-order differential equation • We approximate analog decoding as the numerical method of SOR applied to the fixed-point problem of iterative decoding • We show SOR provides considerable performance improvement over the conventional SS • Analog decoding can not only increase the ratio of speed to power consumption and decrease the fabrication area but also provide a better performance compared to digital synchronous decoding • This work provides an ``ideal” analog decoding benchmark • Our work also suggests a general framework on improving iterative decoding algorithms on graphs with cycles

26. Test Results of (32,8) MS Analog Decoder Chip