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Cutting Edge Chip Technology for RFID - Applications

Cutting Edge Chip Technology for RFID - Applications. Reinhard Meindl, Philips Semiconductors Sophia Antipolis, 2004-05-25. The eye of the silicon guy. The eye of the silicon guy. 1.1 Standards Air interface and application standards Interoperability Regulatory conditions

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Cutting Edge Chip Technology for RFID - Applications

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  1. Cutting Edge Chip Technology for RFID - Applications Reinhard Meindl, Philips Semiconductors Sophia Antipolis, 2004-05-25

  2. The eye of the silicon guy

  3. The eye of the silicon guy

  4. 1.1 Standards Air interface and application standards Interoperability Regulatory conditions Legal framework Quality of standards Few standards with consistent specifications are good standards Conflicting standards are bad standards Market requirements 4

  5. 1.2 Data storage and distance 1 MB Flash Cards 72 KB EE (e-Passport) 4 KB – 32 KB - EE (Banking, e-Gov card) 0,1 1 KB – 5 KB - EE (Transport card) 1 kb - EE (Item tracking label) 1 256 b – 2 kb EE (Animal ID) 64 bit r/o (EPC) 10 Labels M (distance)

  6. Transaction speed Data rates Memory Read / Write speed Anticollision speed Convenience Contact-less Touch´n Go vs. hands-free Insensitivity against dust and dirt No line of sight required Security Broad range from “none” to “high end security certified” Example: Banking, e-Gov requires CC EAL5+ 1.4 Functionality

  7. 2.1 RFID transponders for automotive 2.2 RFID labels for item tracking 2.3 Contact-less and dual interface cards 2.4 Near Field Communication 2. Applications 4

  8. Characteristics Targets Minimise power consumption of NV memory, analogue and digital circuits Low , lower,lowest power Minimise costs, maximize physical reliability Low , lower,lowest chip size Balance well power consumption with cell size and logical reliability Efficient NV - memory Achieve reliable, interoperable and robust system behaviour Sophisticated analogue circuitry Achieve security certificates Maximise operating distance Security for chip cards respective Operating distance for labels Optimisation for non-standard RFID packages Application specific assembly 3 Chip design

  9. Interoperability Interface robustness Power consumption Design methodology Carrier frequency Clock generation Example: Hitag 2 @ 125 kHz: 3-5 uW Operating distance Differentiate between read and write operations Continuous operating vs. fragmented operation Example: UCODE @ UHF: 8 m 3.1 Air interface & analog

  10. NV Memory Currently: EEPROM and FLASH 2st generation candidates failed (FRAM) 3rd generation candidates with high potential (MRAM) Digital Synchronous vs. asynchronous design Hardwired vs. ROM masked microcontroller design Endless security enhancement race 3.3 Memory and digital

  11. 4. Silicon manufacturing 12” 8” 8” 8” Wafer diameter CMOS CMOS CMOS CMOS + BiCMOS 90 nm 0.14 µm 0.18 µm 0.35 µm 01 02 03 04 05 06 07

  12. 5.1 Special packages 5.2 Labels 5.3 Card modules 5.4 Standard packages 5. Packaging

  13. RFID chips are challenging Robust behavior on the air interface is key Design methodology and silicon manufacturing need to be tailored to application specific requirements Special packages required RFID chips are attractive Fast growing markets High volumes Many application opportunities Summary

  14. Thank you for your attention !

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