The von Neumann Model – Chapter 4

1. The von Neumann Model – Chapter 4 COMP 2620 Dr. James Money COMP 2620

2. The LC-3 as a von Neumann Machine

3. Instruction Cycle • Each instruction is handled in a systematic way through a sequence of steps call the instruction cycle • Each step is called a phase • There are six phases to the cycle

4. Instruction Cycle • The six phases of the instruction cycle are: • Fetch • Decode • Evaluate Address • Fetch Operands • Execute • Store Result

5. Instruction types • There are three instruction types: • Operate instruction – processes data, such as ADD • Data movement instruction – moves data from one place to another, such as LDR • Control instruction – alters the flow of execution in a program, such as JMP

6. Instruction types • The control instruction changes the sequence of execution in the processing unit • Normally, the MAR is loaded from the PC at the beginning of processing • Thus, the control instruction must affect the PC value during the EXECUTE phase • We use this generate loops and branches

7. Example: LC-3 JMP Instruction • Set the PC to the value contained in a register. This becomes the address of the next instruction to fetch. “Load the contents of R3 into the PC.”

8. Control of Instruction Cycle • We’ve described the six phases, each having a number of steps • For example, the FETCH instruction requires • loading the MAR • issuing a read memory command • reading MDR -> IR • Recall the finite state machine is overseeing all the operations

9. Control of Instruction Cycle

10. Control of Instruction Cycle • Remember, processing starts in state 1 • The FETCH takes three clock cycles • MAR is loaded with PC and PC=PC+1 • Finite state machine asserts GatePC and LD.MAR • PCMUX selects the +1 line and assert LD.PC signal for output • MDR is loaded with instruction from memory • MDR -> IR • Asserts GateMDR and LD.IR

11. Control of Instruction Cycle • DECODE takes one cycle in state 4 • IR is used as input to for high order 4 bits(IR[15:12]) to finite state machine • Execution continues until each instruction completes and the next state is set to state 1 again

12. Stopping the Computer • The processing unit continues to run forever • We need a way to stop processing so we can turn off the computer(that is, besides using the power switch itself) • Even if a program finishes, others are waiting to run by the operating system • To do this, we must stop the clock

13. Stopping the Computer • The clock defines one machine cycle • This allows the finite state machine to run precisely • We must stop the clock to stop the instruction cycle

14. Stopping the Computer • The clock generator is a crystal oscillator, which is a piezoelectric device • For our purposes, we consider it a black box that produces oscillating voltage

15. Stopping the Computer • The clock circuit is shown below. It have a RUN latch which controls the clock

16. Stopping the Computer • If the RUN latch is in the 1 state, that is Q=1, the clock output is sent out • If the run latch is 0 (Q=0), then the clock circuit outputs 0 • So we need only clear the RUN latch to stop execution • Typically this is done with a HALT instruction