1 / 6

CFEB Firmware Details

CFEB Firmware Details. Jianhui Gu The Ohio State University. SCA Sampling. Pulse. 50ns. SCA, SCA_block. Pre-Trigger. On arrival of Pre-trigger (any of the 16 time slots), the yellow, blue and green SCA blocks are saved to wait for L1A.

amma
Download Presentation

CFEB Firmware Details

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. CFEB Firmware Details Jianhui Gu The Ohio State University

  2. SCA Sampling Pulse 50ns SCA, SCA_block Pre-Trigger On arrival of Pre-trigger (any of the 16 time slots), the yellow, blue and green SCA blocks are saved to wait for L1A. The timing between pre-trigger and SCA block is determined by the Firmware and pre_block_end setting in configure file. The timing between pre-trigger and peak of pulse is determined by the comparator, skewclear cable delay (counter_set by LCT_cable_delay), and TMB logic.

  3. Delay measurement Delay between Buckeye output Peak of the pulse to pre-trigger: 490ns~520ns (four measurement on detector, elog#56630) This means that if we want to have more pedestals in the readout, we need save the previous SCA block for digitization, and release and that block for re-use if no pre-trigger, which is NOT minor change in CFEB firmware.

  4. SCA readout Pulse 1 2 3 4 5 6 7 8 1 2 3 SCA, SCA_block Pre-Trigger L1A (2900ns later) 3BX matching First readout sample 1 2 3 4 5 6 7 8 1 L1A (2900ns later) 7BX matching First readout sample 1 2 3 4 5 6 7 8 1 2 3 Indicates a ‘perfect’ match, LCT&L1A match at bx_0 • 3bx matching to 7bx matching: 50ns pulse peak shift

  5. Correction for the 50ns shift • Because of the large PulsePre-trigger latency, the pre_block_end has been set to minimum. • PeripheralCrate configure file: (elog#57223): LCT_CABLE_DELAY (pre-trigger) Step1: move 1bx Step 2: move another 1bx: all except 4 chambers on plus endcap and 15 on minus endcap. It is not perfect, but should be OK. Run#83617: 7bx firmware Run#83720: 1 bx shift Run#83725 and later: 2bx shift

  6. Future change in CFEB firmware • Major change in CFEB firmware: Save one more previous SCA block, release and re-use that SCA block if no pre-trigger (lots of state_machine timing movement). Benefit: 1. more adjustable cushion for the 7bx matching; 2. It is possible to use the ‘real’ CLCT or LCT instead of pre-trigger. (The ‘real’ CLCT or LCT has longer delay, but less noise or lower rate) Disadvantage: Potential reliability issue: we do not rush for firmware. The current firmware has been tested for more than a year. The 7bx change is relatively minor. Do it worth the effort?

More Related