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Lecture 2.2. Paolo PRINETTO Politecnico di Torino (Italy) University of Illinois at Chicago, IL (USA) Paolo.Prinetto@polito.it Prinetto@uic.edu www.testgroup.polito.it. Design representations. Goal.
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Lecture 2.2 Paolo PRINETTO Politecnico di Torino (Italy)University of Illinois at Chicago, IL (USA) Paolo.Prinetto@polito.it Prinetto@uic.edu www.testgroup.polito.it Design representations
Goal • This lecture introduces the representation domains and abstraction levels mostly used to represent the design steps of a digital system.
Homework • No particular homework is foreseen
Prerequisites • Lecture # 2.1
Further readings • No particular suggestion
Outline • The representation matrix • Some relevant operations.
abstraction domain The sub-spaceabstraction domain • The sub-space • is particularly meaningful to represent design descriptions.
Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains
The “abstraction level”deals with the desired degree of details Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains
Abstractionlevels system RT logic device • The “representation domain” deals with the set of particular aspects of interest behavior structure physic geometry Representationdomains
Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains
Abstractionlevels It describes the behavior of the system, in terms of Input/Output relationships system RT logic device behavior structure physic geometry Representationdomains
Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains
It describes the structure(i.e., the topology)of the system, in terms of a set of blocks, properly interconnected Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains
It describes the structure(i.e., the topology)of the system, in terms of a set of blocks, properly interconnected Abstractionlevels system RT logic device The description is technology independent behavior structure physic geometry Representationdomains
Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains
It describes the physical structure of the system, in terms of elementary components. They are used to implement the blocks defined in the structural domain. Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains
It describes the physical structure of the system, in terms of elementary components. They are used to implement the blocks defined in the structural domain. Abstractionlevels system RT logic device The description is technology dependent behavior structure physic geometry Representationdomains
Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains
It describes the aspect of the system, in terms of geometrical patterns.These implement the blocks defined in the physical domain. Abstractionlevels system RT logic device behavior structure physic geometry Representationdomains
Note • The “geometrical domain” is out of the scope of the present course and it will be thus no further considered.
behavior structure physic Abstractionlevels system RT logic device • Processes,algorithms Representationdomains
SYSTEM POWER_ON POWER_OFF OFF ON RESET WAIT_CMD EXECUTING READ_DATA PROCESS_DATA EXECUTE A Y B Z
behavior structure physic Abstractionlevels system RT logic device CPUs,memories,buses Representationdomains
req1 req2 reqn end1 end2 endn ack1 ack2 ackn nak1 nak2 nakn send1j recvi1 send2j recvi2 sendnj recvin P1 P2 Pn … Controller
behavior structure physic Abstractionlevels system RT logic device Boards,chips,connectors Representationdomains
behavior structure physic Abstractionlevels system RT logic device • Logic, arithmetic, transfer operations; STG Representationdomains
State Transition Graph (STG) reset 1 0 A,0 B,0 0 1 0 1 1 C,0 D,1 0
behavior structure physic Abstractionlevels Arithmetic logicfunctional blocks system RT logic device Representationdomains
A C B COMP > 0 1 MUX D ld
behavior structure physic Abstractionlevels Technology Libraries of blocks system RT logic device Representationdomains
behavior structure physic Abstractionlevels system RT logic device • Logic equations Representationdomains
s1 s2 00 01 11 10 s3 1 0 1 1 1 0 1 0 0 1 s1 s2 s2 1 0 s3 1 1 0 function f • s1’ s2’ + s1 s3’ + s1 s2 .i 3 .o 1 00- 1 1-0 1 11- 1 .e
behavior structure physic Abstractionlevels Ideal logic gates,flip-flops,latches system RT logic device Representationdomains
behavior structure physic Abstractionlevels system RT logic device Library Cells Representationdomains
Netlists • Structural descriptions at the logic level are usually referred to as netlist. • Netlist descriptions are performed according to standards formats, such as: EDIF, JEDEC, etc.
behavior structure physic Abstractionlevels system RT logic device • V(t), I(t), H() Representationdomains
behavior structure physic Abstractionlevels system RT logic device Transistors,capacitors,resistors Representationdomains
+V MP IN OUT MN GND [P.L. Civera]
behavior structure physic Abstractionlevels system RT logic device Rectangles Representationdomains
Outline • The representation matrix • Some relevant operations.
Relevant operations • Each point in the abstraction-domainsub-spacecorresponds to a specific design description • Each design step corresponds to a movement from one point to another in the design space • Some movements correspond to particularly significant design steps.
Synthesis Abstraction levels Representationdomains
Synthesis Methodologies • Synthesis Methodologies for digital systems are usually classified according to two orthogonal criteria: • involved synthesis tools • target building blocks.
Synthesis Methodologies • Synthesis Methodologies for digital systems are usually classified according to two orthogonal criteria: • involved synthesis tools • target building blocks. • Manual • Automated • Partially automated
Synthesis Methodologies • Synthesis Methodologies for digital systems are usually classified according to two orthogonal criteria: • involved synthesis tools • target building blocks. • Manual • Automated • Partially automated • Behavioral synthesis • RT level synthesis • logic level synthesis