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DSP C5000

DSP C5000. Chapter 18 Image Compression and Hardware Extensions. Image Compression. Discrete Cosine Transform (DCT) based compression Still image: JPEG. Remove spatial redundancy Video: H263, MPEG4. Remove spatial redundancy Remove temporal redundancy. JPEG Encoder.

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DSP C5000

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  1. DSP C5000 Chapter 18 Image Compression and Hardware Extensions

  2. Image Compression • Discrete Cosine Transform (DCT) based compression • Still image: JPEG. • Remove spatial redundancy • Video: H263, MPEG4. • Remove spatial redundancy • Remove temporal redundancy

  3. JPEG Encoder • Image is split into 8x8 pixel block that are processed . • DCT is applied on input block to obtain the frequency data. • Values are read from low to high frequency thanks to zig-zag addressing. • Data are then quantized according to a quality factor. • This output is then run length and entropy coded.

  4. JPEG Decoder • Data are entropy decoded. • They are dequantized according to a quality factor. • Zig-zag addressing to re-order the data pixel by pixel. • Inverse DCT to recover spatial data.

  5. H263 and MPEG4 encoder • Same basic building blocks Hardware accelerator provided by C5509/10

  6. H263 and MPEG4 Decoder • Same basic building blocks Hardware accelerator provided by C5509/10

  7. Hardware Extensions • ‘C5509 and ‘C5510 provide H/W extensions for video compression: • DCT, IDCT • Pixel interpolation • Motion estimation • Hardware extensions are embedded co-processors: • Access to ACx, DARAM and SARAM. • Provide video codec with less than half of the processing bandwidth.

  8. DCT H/W Extension 1 of 5 • Allows 4x4 and 8x8 pixels DCT/IDCT computation: • 2D DCT • 2D IDCT

  9. DCT H/W Extension 2 of 5 • Basic steps to complete a 2D DCT/IDCT: • Input Data: macro block (4x4 or 8x8) is read in (DCT). DCT coefficient matrix is read in (IDCT). • Column DCT/IDCT process: output to temporary registers that will be transposed for Row processing. • Row DCT/IDCT process: data read from temporary register which are processed column by column.

  10. DCT H/W Extension 3 of 5

  11. DCT H/W Extension 4 of 5 • Instruction set: • Load+computation+transfer to accumulator: ACy=copr(k8,ACx,Xmem,Ymem) • Computation+transfer to accumulator+memory write: ACy=copr(k8,ACx,ACy),Lmem=Acz • Special instructions: ACy=copr(k8,ACx,ACy) • Refer to application note for details and listings of macros realizing complete 8x8 DCT/IDCT.

  12. DCT H/W Extension 5 of 5 • H/W extensions can be used through C-callable functions provided by IMLIB

  13. Debug • To look at the internal register of the hardware extension … DCT and IDCT Hardware accelerator registers

  14. Tutorial DCT/IDCT with IMLIB • Describe step by step how to use H/W extensions with IMLIB. • Requires installation of IMLIB before continuing. • Requires special memory configuration to obtain optimum performance. • CCS allows display of image contained in DSP memory.

  15. Memory Configuration hwdct.cdb dct.cmd

  16. Display Input Image 1 of 2 • Load hwdct.pjt • Build and load application • Input image is « goldhill » 128x128 which is included by the header file (#include «imagesample.h») at the address goldhill • To have the internal memory initialized use Debug>go to main command. • You are now ready to display the input image using view>Graph>image

  17. Display Input Image 2 of 2

  18. In place DCT Computation   

  19. Actual dct.c Program     

  20. Output Display and Initialization

  21. Output Buffer Update

  22. References • JPEG for digital panel (SPRA664) • TMS320C55x Hardware extensions for image/video applications - Programmer’s reference (SPRU098) • TMS320C55x image/video processing library programmer’s reference (SPRU037)

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