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Memory Management

Memory Management. Adapted From Modern Operating Systems, Andrew S. Tanenbaum. Memory Management . Ideally programmers want memory that is large fast non volatile Memory hierarchy small amount of fast, expensive memory – cache some medium-speed, medium price main memory

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Memory Management

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  1. Memory Management Adapted From Modern Operating Systems, Andrew S. Tanenbaum

  2. Memory Management • Ideally programmers want memory that is • large • fast • non volatile • Memory hierarchy • small amount of fast, expensive memory – cache • some medium-speed, medium price main memory • gigabytes of slow, cheap disk storage • Memory manager handles the memory hierarchy

  3. Basic Memory ManagementMonoprogramming without Swapping or Paging Three simple ways of organizing memory (inan operating system with one user process)

  4. Multiprogramming with Fixed Partitions • Fixed memory partitions • separate input queues for each partition • single input queue

  5. Relocation and Protection • Cannot be sure where program will be loaded in memory • address locations of variables, code routines cannot be absolute(see next slide) • must keep a program out of other processes’ partitions • Use base and limit values • address locations added to base value to map to physical addr • address locations larger than limit value is an error

  6. Seeing the problem extern int x; // placement determined by loader Fcn (void){int y; x=x+1;} Compiles to: but where is x at runtime?

  7. Swapping (1) Memory allocation changes as • processes come into memory • leave memory Shaded regions are unused memory

  8. Swapping (2) • Allocating space for growing data segment • Allocating space for growing stack & data segment

  9. Page Replacement Algorithms (1) • Page fault forces choice • which page must be removed (the “victim”) • Modified page must first be saved • unmodified just overwritten • Better not to choose an often used page • will probably need to be brought back in soon

  10. Optimal Page Replacement Replace page needed at the farthest point in future Optimal but unrealizable (Why?) Not Recently Used (NRU) FIFO Second Chance Clock Least Recently Used (LRU)rarely implemented - why? Not Frequently Used (NFU) Aging Working Set WSClock Page Replacement Algorithms (2)

  11. Design Issues for Paging SystemsLocal versus Global Allocation Policies • Original configuration • Global page replacement • Local page replacement

  12. Virtual MemoryPaging (1) The position and function of the MMU

  13. Paging (2) The relation betweenvirtual addressesand physical memory addres-ses given bypage table

  14. Page Tables (1) 15 bits for addressing Internal operation of MMU with 16 4 KB pages 214+213= 16384+ 8192= 24576 24576+4=24580 Remaining 8 pages ~mapped 16-bit “word”

  15. Page Tables (2) Second-level page tables • 32 bit address with 2 page table fields • 8 bytes/entry • OK for 32-bit machine • 64-bit machine needs 252 entries >30GB Top-level page table

  16. Page Tables (3) Typical page table entry

  17. TLBs – Translation Lookaside Buffers A TLB to speed up paging

  18. 3 table schemes Inverted table 1 entry/page in memory PID+V. Page#

  19. Problem with IPT’s • Virtual-real translation harder • Cannot use virtpg# as index • must search entire table • On EVERY reference

  20. Cleaning Policy • Need for a background process, paging daemon • periodically inspects state of memory • When too few page frames are free • selects pages to evict using a replacement algorithm

  21. Load Control • Despite good designs, system may still thrash when • some processes need more memory • but no processes need less • Solution :Reduce number of processes competing for memory • swap one or more to disk, divide up pages they held • reconsider degree of multiprogramming

  22. Page Size Small page size • Advantages • less internal fragmentation • better fit for various data structures, code sections • Disadvantages • program needs more pages has larger page table

  23. Separate Instruction and Data Spaces • One address space • Separate I and D spaces

  24. Shared Pages Two processes sharing same program sharing its page table

  25. References • Chapters 8 and 9 :OS Concepts, Silberschatz, Galvin, Gagne • Chapter 4: Modern Operating Systems, Andrew S. Tanenbaum • X86 architecture • http://en.wikipedia.org/wiki/Memory_segment • Memory segment • http://en.wikipedia.org/wiki/X86 • Memory model • http://en.wikipedia.org/wiki/Memory_model • IA-32 Intel Architecture Software Developer’s Manual, Volume 1: Basic Architecture • http://www.intel.com/design/pentium4/manuals/index_new.htm

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