Power Analysis of Embedded Software : A Fast Step Towards Software Power Minimization

1. Power Analysis of Embedded Software : A Fast Step Towards Software Power Minimization 指導教授 : 陳少傑 教授 組員 : R91922053 張馨怡 R91922058 林秀萍

2. Outlines • Introduction • Experimental Method • Instruction Level Modeling • Base energy cost • Inner-Instruction effects • Estimation Framework • Software Power Optimization • Instruction reordering • Generation of energy efficient code • Conclusion

3. Introduction • Power constrains become critical component of the design of embedded system. • At present, power analysis tools can only be applied at the lower level. • Circuit level and Gate level • This paper describes the first systematic attempt to model the power cost of the software component of the system. • Instruction-level • Thus can meet the power constrains. • Helpful for power optimization

4. Outlines • Introduction • Experimental Method • Instruction Level Modeling • Base energy cost • Inner-Instruction effects • Estimation Framework • Software Power Optimization • Instruction reordering • Generation of energy efficient code • Conclusion

5. Power and Energy • Power consumption: P=I*Vcc • P---average power • I---average current • Vcc---the supply voltage • Energy consumption: E=P*T • T is execution time, T=N*period • Distinguish power consumption and energy consumption.

6. Current Measurement • The current was measured through a standard off shelf, dual-slope integrating digital ammeter. • Execution time of programs was measured through detection of specific bus states using a logic analyzer. • The programs being considered were put in infinite loops. • Choosing a window of time (100ms)

7. Outlines • Introduction • Experimental Method • Instruction Level Modeling • Base energy cost • Inner-Instruction effects • Estimation Framework • Software Power Optimization • Instruction reordering • Generation of energy efficient code • Conclusion

8. Instruction Level Modeling • Base energy cost : each instruction in the instruction set is assigned a fixed energy cost. • Inner-instruction effects • Effect of circuit state • Effect of resource constrains • Effect of cache misses • The energy cost of these effects is also modeled and used to obtain the total energy cost of a program.

9. Base Energy Cost • The 486DX2 CPU has a five-stage pipeline • EjIk---be the average energy consumed by pipeline stage j when instruction Ik executes in that stage. • Ecycle=E1I1+E2I2+E3I3+E4I4+E5I5 • Eins=jEjI1 • Forming a loop of instances of instruction I1, result in Ecycle=Eins • The average current in this case is jEjI1/(Vcc*period)

10. Base Energy Cost (cont.)

11. Base Energy Cost (cont.) • Variations in base cost • Different functionality • Different addressing modes • the number of 1’s in the binary representation of the immediate data • The range of all variation in all cases is small, about 5% • Considering the address of operand • Typically, operand value and address can be known only at the run time.

12. Inner-Instruction Effects • Inner-instruction effects---when sequences of instructions are considered • Effect of circuit state • Example: XOR BX,1 319.2mA average is ADD AX,DX 313.6mA 314.4mA But actual cost is 323.2mA • Experiments show that the circuit state overhead has a limited range---between 5mA and 30.0mA and most frequently occurred in the vicinity of 15.0 mA

13. Inner-Instruction Effects (cont.) • Effect of resource constrains---can lead to stalls, e.g. pipeline stalls and write buffer stalls • Example:a sequence of 120 MOV DX, [BX] instructions take 164 cycles to execute, instead of 120 due to prefetch buffer stalls • When calculating the energy cost, considering the stall energy cost. • The number of stall cycles is estimated through a traversal of the program code.

14. Inner-Instruction Effects (cont.) • Effect cache misses---a cache miss will lead to extra cycles being consumed (which leads to an energy penalty.) • Experimentally, an average penalty of 216 mA for cache miss • Considering the average penalty multiplied by the cache miss rate.

15. Outlines • Introduction • Experimental Method • Instruction Level Modeling • Base energy cost • Inner-Instruction effects • Estimation Framework • Software Power Optimization • Instruction reordering • Generation of energy efficient code • Conclusion

16. Estimation Framework

17. Estimation Framework (cont.) • Dividing it by the estimated number of cycles(72) gives us an average current of 369.1 mA. • Adding circuit state overhead offset value of 15.0 mA, we get 384.0 mA. The actual value is 385.0mA. • Reasons for the differences • Operand values and addresses not known until run-time • Circuit state overhead • Stall and cache misses

18. Estimation Framework (cont.) Overall flow

19. Outlines • Introduction • Experimental Method • Instruction Level Modeling • Base energy cost • Inner-Instruction effects • Estimation Framework • Software Power Optimization • Instruction reordering • Generation of energy efficient code • Conclusion

20. Instruction Reordering • A technique of scheduling instructions. • This technique is trying to reduce circuit state overhead. • In fact, a variation of only up to 2% • Different architecture may lead to different results.

21. Generating of energy efficient code • Instruction using only register operands cost in the vicinity of 300mA. • Memory reads that hit the cache cost upwards of 430 mA. Memory writes cost upwards of 530 mA. • For example • ADD DX,BX takes just one cycle • ADD DX,[BX] takes two cycles • Reducing in number of memory operands can be achieved by adopting suitable code generation policies.

22. Generating of energy efficient code (cont.) 40.6% 33% • 1cc---general purpose compiler • ht1---hand tuning of the code for shorter running time leads • to 15% reduction in running time. Energy cost goes down by 13.5% • ht2---3 local variables are located to registers and the appropriate • memory operands are replaced by register operands. • ht3---2 more variables are allocated to registers and all redundant • instructions are removed.

23. Outlines • Introduction • Experimental Method • Instruction Level Modeling • Base energy cost • Inner-Instruction effects • Estimation Framework • Software Power Optimization • Instruction reordering • Generation of energy efficient code • Conclusion

24. Conclusion • This paper presents a methodology for analyzing the energy consumption of embedded software. • Based on an instruction level model. • It can be used to help verify if an embedded design meets its energy constrains and be the guideline. • Initial attempts at code re-writing demonstrate significant power reductions-justifying the motivation for such a power analysis technique.

25. Thanks for attention!